# US 2017/0288703 A1 · Polar code encoding method and encoding apparatus

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- Number: US 2017/0288703 A1
- Document ID: US20170288703A1
- Status: Published application
- Kind: A1
- Application number: 15/629,498
- Filed: 2017-06-21
- Published: 2017-10-05
- Earliest claimed: 2014-12-22
- Assignees: Huawei Technologies Co., Ltd.
- Applicants: Huawei Technologies Co., Ltd.
- Inventors: Hui Shen; Bin Li
- Web page: https://patentgrep.com/patent/US20170288703A1

## CPC

- H03M 13/2792: {Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing}
- H03M 13/13: Linear codes
- H03M 13/15: Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes (H03M13/17 takes precedence)
- H03M 13/275: {Interleaver wherein the permutation pattern is obtained using a congruential operation of the type y=ax+b modulo c}
- H03M 13/635: {Error control coding in combination with rate matching}
- H04L 1/0041: {Arrangements at the transmitter end}
- H04L 1/007: {Unequal error protection (for format H04L1/0078; for codes per se H03M13/35)}
- H04L 1/0071: {Use of interleaving (interleaving per se H03M13/27)}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

The present invention discloses a polar code encoding method and encoding apparatus. The method includes: mapping M reserved bits of a broadcast signaling respectively to M low-reliability information bits in K information bits of a polar code, and mapping remaining bits of the broadcast signaling to remaining information bits of the K information bits, to obtain bits after mapping, where M<K, and both M and K are positive integers; and performing polar code encoding on the bits after mapping, to obtain coded bits after encoding. Embodiments of the present invention can improve broadcast signaling transmission reliability.

## Claims

### Claim 1

A polar code encoding method, comprising:
mapping, by a polar code encoding apparatus, M bits of a broadcast signaling to M low-reliability information bits in K information bits of a polar code respectively, and mapping remaining bits of the broadcast signaling to remaining information bits of the K information bits, to obtain K bits after mapping, wherein M<K, and both M and K are positive integers; and
performing, by the polar code encoding apparatus, polar code encoding on the K bits after mapping, to obtain coded bits after encoding.

### Claim 2 (depends on 1)

The method according to claim 1, wherein the M low-reliability information bits have reliability lower than a threshold, or the M low-reliability information bits have the lowest reliability out of the K information bits.

### Claim 3 (depends on 1)

The method according to claim 1, wherein before mapping the M bits of the broadcast signaling respectively to the M low-reliability information bits in the K information bits of the polar code, the method further comprises:
sorting the K information bits according to reliability of the K information bits.

### Claim 4 (depends on 3)

The method according to claim 3, wherein the reliability of one of the K information bits is determined according to a bit capacity, a Bhattacharyya parameter, or an error probability.

### Claim 5 (depends on 1)

The method according to claim 1, wherein after performing polar code encoding on the K bits after mapping, the method further comprises:
performing sorted congruential interleaving on the coded bits after encoding, to obtain coded bits after interleaving; and
inputting, according to a value E, the first E bits of the coded bits after interleaving into a cyclic buffer; or performing order-reversing processing on the coded bits after interleaving, and inputting, according to a value E, the first E bits of the coded bits after order-reversing processing into a cyclic buffer.

### Claim 6 (depends on 5)

The method according to claim 5, wherein performing sorted congruential interleaving comprises:
obtaining a congruential sequence according to a length of the coded bits after encoding;
performing sorting processing on the congruential sequence according to a rule, to obtain a reference sequence;
determining a mapping function according to the congruential sequence and the reference sequence; and
interleaving the coded bits after encoding according to the mapping function, to obtain the coded bits after interleaving.

### Claim 7 (depends on 6)

The method according to claim 6, wherein obtaining the congruential sequence according to the length of the coded bits after encoding comprises:
determining the congruential sequence according to the following formula:
x(0)=x0;
and
x(n+1)=[a*x(n)+c]mod m,
wherein
n=0,1, . . . , (N−2),
wherein N is the length of the coded bits of the polar code after encoding, m represents a modulus m>0, a represents a multiplier, c represents an increment, x(0) represents an initial value, and x(0), x(1), . . . , x(N−1) is the congruential sequence.

### Claim 8 (depends on 1)

The method according to claim 1, wherein the M bits of the broadcast signaling are reserved bits.

### Claim 9

A polar code rate matching method, comprising:
obtaining, by a polar code rate matching apparatus, a congruential sequence according to a length of coded bits of a polar code of a control signaling;
performing, by the polar code rate matching apparatus, sorting processing on the congruential sequence to obtain a reference sequence;
determining, by the polar code rate matching apparatus, a mapping function according to the congruential sequence and the reference sequence; and
interleaving, by the polar code rate matching apparatus, the coded bits of the polar code of the control signaling according to the mapping function to generate coded bits after interleaving.

### Claim 10 (depends on 8)

The method according to claim 8, wherein the control signaling is a broadcast signaling, and the method further comprises:
inputting, according to a value E, the first E bits of the coded bits after interleaving into a cyclic buffer; or
performing order-reversing processing on the coded bits after interleaving, and inputting, according to a value E, the first E bits of the coded bits after order-reversing processing into a cyclic buffer.

### Claim 11 (depends on 9)

The method according to claim 9, wherein obtaining the congruential sequence comprises:
determining the congruential sequence according to the following formula:
x(0)=x0;
and
x(n+1)=[a*x(n)+c]mod m,
wherein
n=0,1, . . . , (N−2),
wherein N is the length of the coded bits of the polar code of the control signaling, in represents a modulus, m>0, a represents a multiplier, c represents an increment, x(0) represents an initial value, and x(0), x(1), . . . , x(N−1) is the congruential sequence.

### Claim 12 (depends on 11)

The method according to claim 11, wherein a=75, c=0, and m=231−1.

### Claim 13

A polar code encoding apparatus, comprising:
a memory comprising processor-executable instructions stored thereon; and
a processor coupled to the memory, wherein the processor is configured to execute the processor-executable instructions to facilitate:
mapping M bits of a broadcast signaling to M low-reliability information bits in K information bits of a polar code respectively, and mapping remaining bits of the broadcast signaling to remaining information bits of the K information bits, to obtain K bits after mapping, wherein M<K, and both M and K are positive integers; and
performing a polar code encoding on the K bits after mapping, to obtain coded bits after encoding.

### Claim 14 (depends on 13)

The apparatus according to claim 13, wherein the M low-reliability information bits have reliability lower than a threshold, or the M low-reliability information bits with have the lowest reliability out of the K information bits.

### Claim 15 (depends on 14)

The apparatus according to claim 14, wherein the processor is further configured to execute the processor-executable instructions to facilitate:
sorting the K information bits according to reliability of the K information bits.

### Claim 16 (depends on 13)

The apparatus according to claim 13, wherein the reliability of one of the K information bits is determined according to a bit capacity, a Bhattacharyya parameter, or an error probability.

### Claim 17 (depends on 13)

The apparatus according to claim 13, wherein the processor is further configured to execute the processor-executable instructions to facilitate:
performing sorted congruential interleaving on the coded bits after encoding, to obtain coded bits after interleaving; and
inputting, according to a value E, the first E bits of the coded bits after interleaving into a cyclic buffer; or performing order-reversing processing on the coded bits after interleaving, and inputting, according to a value E, the first E bits of the coded bits after order-reversing processing into a cyclic buffer.

### Claim 18 (depends on 17)

The apparatus according to claim 17, wherein performing sorted congruential interleaving further comprises:
obtaining a congruential sequence according to a length of the coded bits after encoding;
performing sorting processing on the congruential sequence according to a rule, to obtain a reference sequence;
determining a mapping function according to the congruential sequence and the reference sequence; and
interleaving the coded bits after encoding according to the mapping function, to obtain the coded bits after interleaving.

### Claim 19 (depends on 18)

The encoding apparatus according to claim 18, wherein obtaining the congruential sequence according to the length of the coded bits after encoding is according to the following formula:
x(0)=x0;
and
x(n+1)=[a*x(n)+c]mod m,
wherein
n=0,1, . . . , (N−2),
wherein N is the length of the coded bits of the polar code after encoding, m represents a modulus, m>0, a represents a multiplier, c represents an increment, x(0) represents an initial value), and x(0), x(1), . . . , x(N−1) is the congruential sequence.

### Claim 20 (depends on 13)

The encoding apparatus according to claim 13, wherein the M bits of the broadcast signaling are reserved bits.

### Claim 21

A polar code rate matching apparatus, comprising:
a memory comprising processor-executable instructions stored thereon; and
a processor coupled to the memory, wherein the processor is configured to execute the processor-executable instructions to facilitate:
obtaining a congruential sequence according to a length of coded bits of a polar code of a control signaling;
performing a sorting processing on the congruential sequence according to a rule, to obtain a reference sequence;
determining a mapping function according to the congruential sequence and the reference sequence; and
interleaving the coded bits of the polar code of the control signaling according to the mapping function, to generate coded bits after interleaving.

### Claim 22 (depends on 21)

The rate matching apparatus according to claim 21, wherein the control signaling is a broadcast signaling, and the processor is further configured to execute the processor-executable instructions to facilitate:
inputting, according to a value E, the first E bits of the coded bits after interleaving into a cyclic buffer; or
performing order-reversing processing on the coded bits after interleaving, and inputting according to a value E, the first E bits of the coded bits after order-reversing processing into a cyclic buffer.

### Claim 23 (depends on 21)

The rate matching apparatus according to claim 21, wherein obtaining the congruential sequence is according to the following formula:
x(0)=x0;
and
x(n+1)=[a*x(n)+c]mod m,
wherein
n=0,1, . . . , (N−2),
wherein N is the length of the coded bits of the polar code of the control signaling, m represents a modulus, m>0, a represents a multiplier, c represents an increment, x(0) represents an initial value, and x(0), x(1), . . . , x(N−1) is the congruential sequence.

### Claim 24 (depends on 23)

The rate matching apparatus according to claim 23, wherein a=75, c=0, and m=231−1.