# US 2017/0288691 A1 · Semiconductor apparatus, solid-state image sensing apparatus, and camera system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2017/0288691 A1 - Document ID: US20170288691A1 - Status: Published application - Kind: A1 - Application number: 15/630,608 - Filed: 2017-06-22 - Published: 2017-10-05 - Earliest claimed: 2011-10-21 - Assignees: Sony Corporation - Applicants: Sony Corporation - Inventors: Toshiaki Nagai; Ken Koseki; Yosuke Ueno; Atsushi Suzuki - Web page: https://patentgrep.com/patent/US20170288691A1 ## CPC - H04N 25/65: applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS - H03M 1/08: of noise {(H03M1/0617 takes precedence)} - H03M 1/0863: {of switching transients, e.g. glitches} - H03M 1/123: {Simultaneous, i.e. using one converter per channel but with common control or reference circuits for multiple converters} - H03M 1/56: Input signal compared with linear ramp - H04N 23/54: Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils - H04N 25/621: for the control of blooming - H04N 25/76: Addressed sensors, e.g. MOS or CMOS sensors - H04N 25/778: comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself - H04N 25/78: Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters - H10F 39/18: Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors - H10F 39/8037: {the integrated elements comprising a transistor} - H10F 39/809: {of hybrid image sensors} - H10F 39/811: {Interconnections} - H10F 39/804: {Containers or encapsulations} - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION ## Abstract A semiconductor apparatus, a solid-state image sensing apparatus, and a camera system capable of reducing interference between signals transmitted through adjacent via holes, preventing an increase in the number of the via holes, reducing the area of a chip having sensors thereon and the number of mounting steps thereof. First and second chips are bonded together to form a laminated structure, a wiring between the first chip and the second chip being connected through via holes, the first chip transmitting signals obtained by time-discretizing analog signals generated by respective sensors to the second chip through the corresponding via holes, the second chip sampling the signals transmitted from the first chip through the via holes at a timing different from a timing at which the signals are sampled by the first chip and quantizing the sampled signals to obtain digital signals. ## Claims ### Claim 1 An imaging device comprising: a first substrate including: a plurality of pixels, a pixel of the plurality of pixels being configured to output an analog signal, and a plurality of signal lines, a signal line of the plurality of signal lines being coupled to the pixel; and a second substrate including: a plurality of comparators, a comparator of the plurality of comparators being coupled to the first signal line and including: a first amplifier having a first transistor configured to receive a signal based on the analog signal, a second transistor configured to receive a reference signal, and an output node coupled to the first transistor, a second amplifier having an input transistor configured to receive an output signal from the output node, and a capacitor coupled the output node and the input transistor. ### Claim 2 (depends on 1) The imaging device according to claim 1, wherein the capacitor is disposed between the output node and second amplifier. ### Claim 3 (depends on 1) The imaging device according to claim 1, wherein a gate of the input transistor is coupled to the capacitor. ### Claim 4 (depends on 1) The imaging device according to claim 1, wherein the first transistor and the second transistor have a first conductivity type. ### Claim 5 (depends on 4) The imaging device according to claim 4, wherein the input transistor has a second conductivity type. ### Claim 6 (depends on 1) The imaging device according to claim 1, wherein the capacitor is coupled between the first amplifier and the second amplifier. ### Claim 7 (depends on 1) The imaging device according to claim 1, wherein the second amplifier has an input node coupled to the capacitor. ### Claim 8 (depends on 1) The imaging device according to claim 1, wherein a first terminal of the input transistor is configured to receive a predetermined voltage; ### Claim 9 (depends on 8) The imaging device according to claim 8, wherein a second terminal of the input transistor is coupled to the capacitor. ### Claim 10 (depends on 9) The imaging device according to claim 9, wherein the predetermined voltage is a power source voltage. ### Claim 11 (depends on 1) The imaging device according to claim 1, wherein a gate of the input transistor is configured to receive an output signal from the output node. ### Claim 12 An imaging device comprising: a first substrate including: a pixel array unit including a plurality of pixels, a pixel of the plurality of pixels being configured to receive an incident light and output an analog signal, and a plurality of signal lines, a signal line of plurality of signal lines being coupled to the pixel; and a second substrate including: a plurality of comparators, and a plurality of counters, wherein a comparator of the plurality of comparators includes a first amplifier, a second amplifier, and a capacitor, wherein the first amplifier receives a reference signal and the analog signal, wherein the capacitor is coupled to the first amplifier and the second amplifier, and wherein the second amplifier is coupled to a counter of the plurality of counters. ### Claim 13 (depends on 12) The imaging device according to claim 12, wherein the first amplifier is configured to compare the reference signal and the analog signal. ### Claim 14 (depends on 12) The imaging device according to claim 12, wherein the pixel is coupled to at least one selected from a floating diffusion, a reset transistor, an amplification transistor, and/or a selection transistor. ### Claim 15 (depends on 12) The imaging device according to claim 12, wherein the first amplifier includes a first transistor and a second transistor, a gate of the first transistor being configured to receive the reference signal and a gate of the second transistor being configured to receive the analog signal. ### Claim 16 (depends on 12) The imaging device according to claim 12, wherein the second amplifier includes a third transistor, a gate of the third transistor being configured to receive an output signal from the first amplifier. ### Claim 17 (depends on 16) The imaging device according to claim 16, wherein the capacitor is coupled the gate of the third transistor and one of a drain or a source of the third transistor. ### Claim 18 (depends on 12) The imaging device according to claim 12, wherein the pixel includes a photodiode and a transfer transistor. ### Claim 19 (depends on 12) The imaging device according to claim 12, wherein the first substrate and the second substrate are bonded to each other. ### Claim 20 (depends on 12) The imaging device according to claim 12, wherein the second substrate includes at least a part of a control circuit. ### Claim 21 An imaging device comprising: a first substrate including: a plurality of pixels, a pixel of the plurality of pixels being configured to output an analog signal, and a plurality of signal lines, a signal line of the plurality of signal lines being coupled to the pixel; and a second substrate including: a plurality of comparators, a comparator of the plurality of comparators being coupled to the signal line and including: a first circuit including a first transistor configured to receive a signal based on the analog signal, a second transistor configured to receive a reference signal, and an output node coupled to the first transistor, a second circuit including an input transistor configured to receive an output signal from the output node, and a capacitor coupled the output node and the input transistor. ### Claim 22 (depends on 21) The imaging device according to claim 21, wherein the capacitor is disposed between the output node and the second amplifier. ### Claim 23 (depends on 21) The imaging device according to claim 21, wherein a gate of the input transistor is coupled to the capacitor. ### Claim 24 (depends on 21) The imaging device according to claim 21, wherein the first transistor and the second transistor have a first conductivity type. ### Claim 25 (depends on 24) The imaging device according to claim 24, wherein the input transistor has a second conductivity type. ### Claim 26 (depends on 21) The imaging device according to claim 21, wherein the capacitor is coupled between the first amplifier and the second amplifier. ### Claim 27 (depends on 21) The imaging device according to claim 21, wherein the second amplifier has an input node coupled to the capacitor. ### Claim 28 (depends on 21) The imaging device according to claim 21, wherein a first terminal of the input transistor configured to receive a predetermined voltage. ### Claim 29 (depends on 28) The imaging device according to claim 28, wherein a second terminal of the input transistor is coupled to the capacitor. ### Claim 30 (depends on 29) The imaging device according to claim 29, wherein the predetermined voltage is a power source voltage.