# US 2017/0288650 A1 · Tank circuit and frequency hopping for isolators

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- Number: US 2017/0288650 A1
- Document ID: US20170288650A1
- Status: Published application
- Kind: A1
- Application number: 15/087,723
- Filed: 2016-03-31
- Published: 2017-10-05
- Earliest claimed: 2016-03-31
- Assignees: Analog Devices Global Unlimited Company
- Applicants: Analog Devices Global
- Inventors: Xin YANG; Tianting ZHAO; Baoxing CHEN
- Web page: https://patentgrep.com/patent/US20170288650A1

## CPC

- H03K 3/013: Modifications of generator to prevent operation by noise or interference
- H03B 5/08: with frequency-determining element comprising lumped inductance and capacitance
- H03B 5/12: active element in amplifier being semiconductor device (H03B5/14 takes precedence)
- H03B 5/1228: {the amplifier comprising one or more field effect transistors}
- H03B 5/1231: {the amplifier comprising one or more bipolar transistors}
- H03B 5/1253: {the transistors being field-effect transistors}
- H03B 5/1265: {switched capacitors}
- H03B 5/1296: {the feedback circuit comprising a transformer}
- H03B 2200/0072: Frequency hopping and enabling of rapid frequency changes
- H03B 2201/0266: the means comprising a transistor
- H10W 90/753: {between laterally-adjacent chips}
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- H03B: GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS (generators adapted for electrophonic musical instruments G10H; masers or lasers H01S; generation of oscillations in plasma H05H)
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Embodiments of the present disclosure may provide a circuit comprising a tank circuit. The tank circuit may include an inductor having a pair of terminals, a first pair of transistors, and a first pair of capacitors. Each transistor may be coupled between a respective terminal of the inductor and a reference voltage along a source-to-drain path of the transistor. Each capacitor may be provided in a signal path between an inductor terminal coupled to a respective first transistor in the first pair and a gate of a second transistor in the first pair.

## Claims

### Claim 1

An oscillator circuit, comprising:
a tank circuit including:
an inductor having a pair of terminals, the inductor including a central tap coupled to a high reference voltage,
a first pair of transistors, each transistor coupled between a respective terminal of the inductor and a ground reference voltage along a source-to-drain path of the transistor, and
a first pair of capacitors, each capacitor provided in a signal path between an inductor terminal coupled to a respective first transistor in the first pair and a gate of a second transistor in the first pair.

### Claim 2 (depends on 1)

The oscillator circuit of claim 1, the tank circuit further including:
a second pair of transistors coupled along their source-to-drain paths between the gates of respective transistors in the first pair and the ground reference voltage, and having a gate to receive a control signal.

### Claim 3 (depends on 2)

The oscillator circuit of claim 2, wherein a first state of the control signal activates the second pair of transistors, the activation of the second pair of transistors deactivating the first pair of transistors and disabling an oscillation of the oscillator circuit.

### Claim 4 (depends on 3)

The oscillator circuit of claim 3, wherein a second state of the control signal deactivates the second pair of transistors, the deactivation of the second pair of transistors activating the first pair of transistors and enabling an oscillation of the oscillator circuit.

### Claim 5 (depends on 2)

The oscillator circuit of claim 2, further comprising a control circuit to provide the control signal.

### Claim 6 (depends on 1)

The oscillator circuit of claim 1, wherein the first pair of transistors are DMOS transistors.

### Claim 7 (depends on 1)

The oscillator circuit of claim 1, wherein the first pair of capacitors have substantially equal capacitances.

### Claim 8 (depends on 1)

The oscillator circuit of claim 1, wherein the first pair of transistors are substantially the same size.

### Claim 9 (depends on 1)

The oscillator circuit of claim 1, further comprising at least one sub-tank circuit, each sub-tank circuit including:
a second pair of transistors, each transistor coupled between a respective terminal of the inductor and the ground reference voltage along of a source-to-drain path of the transistor, and
a second pair of capacitors, each capacitor provided in a signal path between an inductor terminal coupled to a respective first transistor in the second pair and a gate of a second transistor in the second pair.

### Claim 10 (depends on 9)

The oscillator circuit of claim 9, wherein each sub-tank circuit further comprises a third pair of transistors coupled along their source-to-drain paths between the gates of respective transistors in the second pair and the ground reference voltage, and having a gate to receive a control signal.

### Claim 11 (depends on 10)

The oscillator circuit of claim 10, wherein a first state of the control signal activates the third pair of transistors, the activation of the third pair of transistors deactivating the second pair of transistors, and
a second state of the control signal deactivates the third pair of transistors, the deactivation of the third pair of transistors activating the second pair of transistors.

### Claim 12 (depends on 9)

The oscillator circuit of claim 9, wherein each sub-tank circuit further comprises a third pair of transistors coupled along their source-to-drain paths between the capacitors of the second pair of capacitors and the gates of transistors in the second pair of transistors, and having gates to receive a second control signal.

### Claim 13 (depends on 12)

The oscillator circuit of claim 12, wherein a first state of the second control signal activates the third pair of transistors, the activation of the third pair of transistors enabling oscillation of the sub-tank circuit, and
a second state of the second control signal deactivates the third pair of transistors.

### Claim 14 (depends on 9)

The oscillator circuit of claim 9, wherein the first pair and second pair of transistors are DMOS transistors and are substantially the same size.

### Claim 15 (depends on 1)

The oscillator circuit of claim 1, wherein the inductor is a first winding of a transformer provided in a first circuit system, a second winding of the transformer provided in a second circuit system that is galvanically isolated from the first circuit system.

### Claim 16

(canceled)

### Claim 17

A method, comprising:
at a first time instance activating an inductor-capacitor (LC) tank circuit by:
activating a first pair of transistors of the tank circuit, each coupled between a respective terminal of an inductor having a pair of terminals and a ground reference voltage along a source-to-drain path of the transistor, the inductor including a central tap coupled to a high reference voltage,
coupling, as a result of the activating, a first of a pair of capacitors of the tank circuit provided in a signal path between a source or drain terminal of a first transistor in the first pair and a gate of a second transistor in the first pair, and
coupling, as a result of the activating, a second of the pair of capacitors provided in a signal path between a source or drain terminal of the second transistor in the first pair and a gate of the first transistor in the first pair, wherein a voltage having an oscillation frequency is generated at the terminals of the inductor to transmit power over an isolation barrier.

### Claim 18 (depends on 17)

The method of claim 17, wherein activating the first pair of transistors of the tank circuit includes deactivating a second pair of transistors of the tank circuit, the second pair of transistors of the tank circuit coupled along their source-to-drain paths between the gates of respective transistors in the first pair and the ground reference voltage, by providing a first state of a control signal to gates of the second pair of transistors.

### Claim 19 (depends on 17)

The method of claim 17, further comprising at the first time instance:
selectively activating one or more of a plurality of sub-tank circuits connected in parallel with the LC tank circuit.

### Claim 20 (depends on 19)

The method as recited in claim 19, wherein the activating of each of the selectively activated one or more sub-tank circuits includes:
activating a first pair of transistors of the sub-tank circuit, each coupled between a respective terminal of the inductor and the ground reference voltage along a source-to-drain path of the transistor, and
coupling, as a result of the activating, a first of a pair of capacitors of the sub-tank circuit provided in a signal path between a source or drain terminal of a first transistor in the first pair of transistors of the sub-tank circuit and a gate of a second transistor in the first pair of transistors of the sub-tank circuit,
coupling, as a result of the activating, a second of the pair of capacitors provided in a signal path between a source or drain terminal of the other transistor in the first pair of transistors of the sub-tank circuit and a gate of the first transistor in the first pair.

### Claim 21 (depends on 20)

The method of claim 20, wherein activating the first pair of transistors of the sub-tank circuit includes deactivating a second pair of transistors of the sub-tank circuit, the second pair of transistors of the sub-tank circuit coupled along their source-to-drain paths between the gates of respective transistors in the first pair of transistors of the sub-tank circuit and the ground reference voltage, by providing a first state of a control signal to gates of the second pair of transistors of the sub-tank circuit.

### Claim 22 (depends on 21)

The method of claim 21, wherein activating the first pair of transistors of the sub-tank circuit further includes activating a third pair of transistors of the sub-tank circuit, the third pair of transistors of the sub-tank circuit coupled along their source-to-drain paths between the gates of respective transistors in the first pair of transistors of the sub-tank circuit and the pair of capacitors of the sub-tank circuit, by providing a first state of a second control signal to the gates of the third pair of transistors of the sub-tank circuit.

### Claim 23 (depends on 19)

The method as recited in claim 19, further comprising:
at a second time instance, frequency hopping to a second oscillation frequency by selectively activating a different set of one or more of a plurality of sub-tank circuits than at the first time instance.

### Claim 24 (depends on 17)

The method of claim 17, wherein a different oscillation frequency is generated for each time instance of a time period.

### Claim 25

A circuit, comprising:
means for activating a first pair of transistors of an inductor-capacitor (LC) tank at a first time instance, each transistor coupled between a respective terminal of an inductor having a pair of terminals and a ground reference voltage along a source-to-drain path of the transistor, the inductor including a central tap coupled to a high reference voltage,
a first means for coupling, as a result of the activating, a first of a pair of capacitors of the tank circuit provided in a signal path between a source or drain terminal of a first transistor in the first pair and a gate of a second transistor in the first pair, and
a second means coupling, as a result of the activating, a second of the pair of capacitors provided in a signal path between a source or drain terminal of the other transistor in the first pair and a gate of the first transistor in the first pair, wherein a voltage having the oscillation frequency is generated at the terminals of the inductor to transmit power over an isolation barrier.

### Claim 26 (depends on 25)

The circuit of claim 25, wherein the means for activating the first pair of transistors of the tank circuit includes means for deactivating a second pair of transistors of the tank circuit, the second pair of transistors of the tank circuit coupled along their source-to-drain paths between the gates of respective transistors in the first pair of transistors of the tank circuit and the ground reference voltage.

### Claim 27

The circuit of 25, further comprising:
means for selectively activating one or more of a plurality of sub-tank circuits connected in parallel with the LC tank circuit at the first time instance.

### Claim 28 (depends on 27)

The circuit of claim 27, wherein the means for selectivity activating each of the selectively activated one or more sub-tank circuits includes:
means for activating a first pair of transistors of the sub-tank circuit, each coupled between a respective terminal of the inductor and the ground reference voltage along a source-to-drain path of the transistor, and
a first means coupling, as a result of the activating, a first of a pair of capacitors of the sub-tank circuit provided in a signal path between a source or drain terminal of a first transistor in the first pair of transistors of the sub-tank circuit and a gate of a second transistor in the first pair of transistors of the sub-tank circuit,
a second means for coupling, as a result of the activating, a second of the pair of capacitors provided in a signal path between a source or drain terminal of the second transistor in the first pair of transistors of the sub-tank circuit and a gate of the first transistor in the first pair.

### Claim 29 (depends on 27)

The circuit of claim 27, further comprising:
means for frequency hopping at a second time instance by selectively activating a different set of one or more of a plurality of sub-tank circuits than at the first time instance.

### Claim 30

The circuit of 25, wherein a different oscillation frequency is generated for each time instance of a time period.