# US 2017/0288392 A1 · Electronic Device with Reverse Voltage Protection Circuitry for Multiple Control Lines > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2017/0288392 A1 - Document ID: US20170288392A1 - Status: Published application - Kind: A1 - Application number: 15/091,100 - Filed: 2016-04-05 - Published: 2017-10-05 - Earliest claimed: 2016-04-05 - Assignees: Apple Inc. - Applicants: Apple Inc. - Inventors: Robert M. Proie; Salvatore Reddiconto - Web page: https://patentgrep.com/patent/US20170288392A1 ## CPC - H02H 3/20: responsive to excess voltage - G06F 1/266: {Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips} - H02H 3/003: {responsive to reversal of power transmission direction (reversal of direct current H02H3/18)} - H02H 3/18: responsive to reversal of direct current - H02H 9/02: responsive to excess current {(current limitation for voltage regulators G05F1/573; disconnection after limiting H02H3/025)} - H10D 84/403: {Combinations of FETs or IGBTs with BJTs and with one or more of diodes, resistors or capacitors} - H02H 11/003: {using a field effect transistor as protecting element in one of the supply lines} - H02H: EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS (indicating or signalling undesired working conditions G01R, e.g. G01R31/00, G08B; locating faults along lines G01R31/08; emergency protective devices H01H) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A host electronic device may be coupled to an accessory electronic device. The host device and the accessory device may be connected via power supply lines and user data lines. If the host and accessory devices are improperly connected or if the accessory device is exposed to an incorrect voltage environment, the internal circuitry on the accessory device can be damaged. The accessory device may therefore include a reverse voltage protection circuit that can help prevent a large amount of current from inadvertently flowing into the accessory device. The protection circuit may include a low-side-enabled reverse current protection switch coupled between the external and internal ground terminals and also a single low-drop switch coupled to each of the user data lines. The low-drop switch will be activated whenever the voltage at the external ground terminal exceeds the voltage at the data line to help deactivate low-side-enabled reverse current protection switch. ## Claims ### Claim 1 A reverse voltage protection circuit, comprising: a first external power supply port; a second external power supply port; an external data port; an internal power supply terminal; a first switch that is coupled between the second external power supply port and the internal power supply terminal; and a second switch that is coupled between the external data port and the first switch. ### Claim 2 (depends on 1) The reverse voltage protection circuit of claim 1, wherein the first switch comprises a metal-oxide-semiconductor field-effect transistor (MOSFET), and wherein the second switch comprises a different type of switch than the first switch. ### Claim 3 (depends on 2) The reverse voltage protection circuit of claim 2, wherein the first switch comprises an n-channel transistor having a source terminal that is connected to the second external power supply port, a drain terminal that is connected to the internal power supply terminal, and a gate terminal that is coupled to the first external power supply port. ### Claim 4 (depends on 3) The reverse voltage protection circuit of claim 3, further comprising: a current limiting resistor coupled between the gate terminal of the n-channel transistor and the first external power supply port. ### Claim 5 (depends on 1) The reverse voltage protection circuit of claim 1, wherein the first external power supply port comprises a positive power supply port, wherein the second external power supply port comprises a ground power supply port, and wherein the internal power supply terminal comprises a ground power supply terminal. ### Claim 6 (depends on 5) The reverse voltage protection circuit of claim 5, wherein the second switch is smaller than the first switch to help minimize capacitive loading on the external data port. ### Claim 7 (depends on 6) The reverse voltage protection circuit of claim 6, wherein the second switch comprises a bipolar junction transistor (BJT). ### Claim 8 (depends on 7) The reverse voltage protection circuit of claim 7, wherein the second switch comprises an NPN bipolar junction transistor having an emitter terminal that is connected to the external data port, a collector terminal that is coupled to the first external power supply port, and a base terminal that is coupled to the second external power supply port. ### Claim 9 (depends on 8) The reverse voltage protection circuit of claim 8, further comprising: a current limiting resistor coupled between the base terminal of the NPN bipolar junction transistor and the second external power supply port. ### Claim 10 (depends on 8) The reverse voltage protection circuit of claim 8, further comprising: a low-drop diode coupled between the emitter terminal of the NPN bipolar junction transistor and the internal power supply terminal. ### Claim 11 A reverse voltage protection circuit, comprising: a first external power supply port on which a first voltage is provided; a second external power supply port on which a second voltage is provided; an external data port on which a third voltage is provided; a main switch that turns off when the second voltage exceeds the first voltage; and an auxiliary switch that turns on when the second voltage exceeds the third voltage to deactivate the main switch. ### Claim 12 (depends on 11) The reverse voltage protection circuit of claim 11, wherein the main switch and the auxiliary switches are fabricated using different types of semiconductor processes. ### Claim 13 (depends on 12) The reverse voltage protection circuit of claim 12, wherein the main switch comprises a metal-oxide-semiconductor field-effect transistor, and wherein the auxiliary switch comprises a bipolar junction transistor. ### Claim 14 (depends on 11) The reverse voltage protection circuit of claim 11, wherein the auxiliary switch is at least two times smaller than the main switch. ### Claim 15 (depends on 11) The reverse voltage protection circuit of claim 11, wherein the main switch has a first threshold voltage level, and wherein the auxiliary switch has a second threshold voltage level that is less than the first threshold voltage level. ### Claim 16 An accessory electronic device that is coupled to a host electronic device and that comprises: an external ground port; a first external non-ground port; a second external non-ground port; an internal ground terminal; a first switch that is coupled between the external ground port and the internal ground terminal; and a second switch that is coupled between the first switch and the second external non-ground port. ### Claim 17 (depends on 16) The accessory electronic device of claim 16, wherein the first external non-ground port comprises a positive power supply port, and wherein the second external non-ground port comprises a user data signal port. ### Claim 18 (depends on 16) The accessory electronic device of claim 16, wherein the first switch comprises an n-channel transistor having a gate terminal that is coupled to the first external non-ground port. ### Claim 19 (depends on 18) The accessory electronic device of claim 18, wherein the second switch comprises a low-drop switch having a first terminal connected to the gate terminal of the n-channel transistor, a second terminal that is connected to the second external non-ground port, and a third terminal that is coupled to the external ground port. ### Claim 20 (depends on 19) The accessory electronic device of claim 19, further comprising: a third external non-ground port; and a third switch having a first terminal connected to the gate terminal of the n-channel transistor, a second terminal that is connected to the third external non-ground port, and a third terminal that is coupled to the external ground port.