# US 2017/0288092 A1 · Semiconductor structure

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- Number: US 2017/0288092 A1
- Document ID: US20170288092A1
- Status: Published application
- Kind: A1
- Application number: 15/627,417
- Filed: 2017-06-19
- Published: 2017-10-05
- Earliest claimed: 2012-11-19
- Assignees: Genesis Photonics Inc.
- Applicants: Genesis Photonics Inc.
- Inventors: Chi-Feng Huang; Ching-Liang Lin; Shen-Jie Wang; Jyun-De Wu; Yu-Chu Li; Chun-Chieh Lee
- Web page: https://patentgrep.com/patent/US20170288092A1

## CPC

- H10H 20/812: within the light-emitting regions, e.g. having quantum confinement structures
- H10H 20/81: Bodies
- H10H 20/811: having quantum effect structures or superlattices, e.g. tunnel junctions
- H10H 20/815: having stress relaxation structures, e.g. buffer layers
- H10H 20/816: having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures
- H10H 20/824: comprising only Group III-V materials, e.g. GaP
- H10H 20/825: containing nitrogen, e.g. GaN
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS

## Abstract

A nitride semiconductor structure and a semiconductor light emitting device including the same are revealed. The nitride semiconductor structure mainly includes a stress control layer disposed between a light emitting layer and a p-type carrier blocking layer. The p-type carrier blocking layer is made from AlxGa1-xN (0<x<1) while the stress control layer is made from AlxInyGa1-x-yN (0<x<1, 0<y<1, 0<x+y<1). The light emitting layer has a multiple quantum well structure formed by a plurality of well layers and barrier layers stacked alternately. There is one well layer disposed between the two barrier layers. Thereby the stress control layer not only improves crystal quality degradation caused by lattice mismatch between the p-type carrier blocking layer and the light emitting layer but also reduces effects of compressive stress on the well layer caused by material differences.

## Claims

### Claim 1

A semiconductor structure comprising:
a first conductivity type semiconductor layer;
a light emitting layer comprises a multiple quantum well (MQW) structure, wherein the MQW structure comprises a plurality of well layers and a plurality of barrier layers stacked alternately;
a super lattice layer disposed between the light emitting layer and the first conductivity type semiconductor layer;
a second conductivity type semiconductor layer;
an aluminum-containing GaN based carrier blocking layer disposed between the light emitting layer and the second conductivity type semiconductor layer; and
an indium-containing GaN based stress control layer disposed between the light emitting layer and the aluminum-containing GaN based carrier blocking layer, wherein a level of indium in the indium-containing GaN based stress control layer is equal to or smaller than a level of indium in well layers of the MQW structure.

### Claim 2 (depends on 1)

The semiconductor structure as claimed in claim 1, wherein the indium-containing GaN based stress control layer further contains aluminum.

### Claim 3 (depends on 1)

The semiconductor structure as claimed in claim 1, wherein the indium-containing GaN based stress control layer is doped with a first conductivity type dopant and a second conductivity type dopant.

### Claim 4 (depends on 3)

The semiconductor structure as claimed in claim 3, wherein both doped concentrations of the first conductivity type dopant and the second conductivity type dopant in the indium-containing GaN based stress control layer are smaller than 1019 cm−3.

### Claim 5 (depends on 3)

The semiconductor structure as claimed in claim 3, wherein the first conductivity type dopant is silicon and the second conductivity type dopant is magnesium.

### Claim 6 (depends on 1)

The semiconductor structure as claimed in claim 1, further comprising an aluminum-containing GaN based carrier blocking layer disposed between the first conductivity type semiconductor layer and the super lattice layer.

### Claim 7 (depends on 1)

The semiconductor structure as claimed in claim 1, wherein the second conductivity type semiconductor layer is doped with a second conductivity type dopant at a concentration higher than 5×1019 cm−3.

### Claim 8

A semiconductor structure comprising:
a first conductivity type semiconductor layer;
a light emitting layer comprises a multiple quantum well (MQW) structure, wherein the MQW structure comprises a plurality of well layers and a plurality of barrier layers stacked alternately;
a second conductivity type semiconductor layer;
a GaN based carrier blocking layer containing aluminum, disposed between the light emitting layer and the second conductivity type semiconductor layer; and
a GaN based stress control layer containing indium and aluminum, disposed between the light emitting layer and the GaN based carrier blocking layer, wherein a level of aluminum in the GaN based stress control layer is smaller than or equal to a level of aluminum in the GaN based carrier blocking layer.

### Claim 9 (depends on 8)

The semiconductor structure as claimed in claim 8, wherein a level of indium in the GaN based stress control layer is equal to or smaller than a level of indium in well layers of the MQW structure.

### Claim 10 (depends on 8)

The semiconductor structure as claimed in claim 8, wherein the GaN based stress control layer is doped with a first conductivity type dopant and a second conductivity type dopant.

### Claim 11 (depends on 8)

The semiconductor structure as claimed in claim 8, further comprising a super lattice layer disposed between the light emitting layer and the first conductivity type semiconductor layer.

### Claim 12 (depends on 11)

The semiconductor structure as claimed in claim 11, further comprising an aluminum-containing GaN based carrier blocking layer disposed between the first conductivity type semiconductor layer and the super lattice layer.

### Claim 13 (depends on 10)

The semiconductor structure as claimed in claim 10, wherein the first conductivity type dopant is silicon and the second conductivity type dopant is magnesium, and both doped concentrations of the first conductivity type dopant and the second conductivity type dopant in the GaN based stress control layer are smaller than 1019 cm−3.

### Claim 14 (depends on 8)

The semiconductor structure as claimed in claim 8, wherein the second conductivity type semiconductor layer is doped with a second conductivity type dopant at a concentration higher than 5×1019 cm−3.

### Claim 15 (depends on 8)

The semiconductor structure as claimed in claim 8, further comprising an aluminum-containing GaN based carrier blocking layer disposed between the first conductivity type semiconductor layer and the light emitting layer.

### Claim 16

A semiconductor structure comprising:
a first conductivity type semiconductor layer;
a light emitting layer comprises a multiple quantum well (MQW) structure, wherein the MQW structure comprises a plurality of well layers and a plurality of barrier layers stacked alternately;
a super lattice layer disposed between the light emitting layer and the first conductivity type semiconductor layer;
a second conductivity type semiconductor layer;
a GaN based carrier blocking layer containing aluminum, disposed between the light emitting layer and the second conductivity type semiconductor layer; and
a GaN based stress control layer containing indium and aluminum, disposed between the light emitting layer and the GaN based carrier blocking layer,
wherein a level of aluminum in the GaN based stress control layer is smaller than or equal to a level of aluminum in the GaN based carrier blocking layer,
wherein a level of indium in the GaN based stress control layer is equal to or smaller than a level of indium in well layers of the MQW structure.

### Claim 17 (depends on 16)

The semiconductor structure as claimed in claim 16, wherein the GaN based stress control layer is doped with a first conductivity type dopant and a second conductivity type dopant.

### Claim 18 (depends on 16)

The semiconductor structure as claimed in claim 16, further comprising an aluminum-containing GaN based carrier blocking layer disposed between the first conductivity type semiconductor layer and the super lattice layer.

### Claim 19 (depends on 17)

The semiconductor structure as claimed in claim 17, wherein the first conductivity type dopant is silicon and the second conductivity type dopant is magnesium, and both doped concentrations of the first conductivity type dopant and the second conductivity type dopant in the GaN based stress control layer are smaller than 1019 cm−3.

### Claim 20 (depends on 16)

The semiconductor structure as claimed in claim 16, wherein the second conductivity type semiconductor layer is doped with a second conductivity type dopant at a concentration higher than 5×1019 cm−3.