# US 2017/0288045 A1 · Multichannel Devices with Improved Performance and Methods of Making the Same

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- Number: US 2017/0288045 A1
- Document ID: US20170288045A1
- Status: Published application
- Kind: A1
- Application number: 15/624,445
- Filed: 2017-06-15
- Published: 2017-10-05
- Earliest claimed: 2014-11-05
- Assignees: Northrop Grumman Systems Corporation
- Inventors: BETTINA A. NECHAY; SHALINI GUPTA; MATTHEW RUSSELL KING; ERIC J. STEWART; ROBERT S. HOWELL; JUSTIN ANDREW PARKE; HARLAN CARL CRAMER; HOWELL GEORGE HENRY; RONALD G. FREITAG; KAREN MARIE RENALDO
- Web page: https://patentgrep.com/patent/US20170288045A1

## CPC

- H10D 30/4738: {having multiple donor layers}
- H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT}
- H10D 30/4732: {using Group III-V semiconductor material}
- H10D 62/221: {of FETs}
- H10D 62/328: {having PN junction gates}
- H10D 62/8171: {Doping structures, e.g. doping superlattices or nipi superlattices}
- H10D 62/824: comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10P 50/242: {of Group IV materials}
- H10D 30/4735: {having delta-doped or planar-doped donor layers}
- H10D 62/117: {Shapes of semiconductor bodies}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A transistor device is provided that comprises a base structure, and a superlattice structure overlying the base structure and comprising a multichannel ridge having sloping sidewalls. The multichannel ridge comprises a plurality of heterostructures that each form a channel of the multichannel ridge, wherein a parameter of at least one of the heterostructures is varied relative to other heterostructures of the plurality of heterostructures. The transistor device further comprises a three-sided gate contact that wraps around and substantially surrounds the top and sides of the multichannel ridge along at least a portion of its depth.

## Claims

### Claim 1

A method of forming a transistor device, the method comprising:
forming a superlattice structure comprising a plurality of heterostructures over a base structure by sequentially depositing each layer of the plurality of heterostructures over the base structure with one layer of each heterostructure being doped;
etching away openings in the superlattice structure over a channel region to form a castellated region in the channel region of alternating multichannel ridges with edges and nonchannel openings; and
performing a gate contact fill process to form a gate contact that wraps around and substantially surrounds the top and sides of each of the alternating multichannel ridges along at least a portion of its depth and connects each one of the alternating multichannel ridges to one another through the non-channel openings.

### Claim 2 (depends on 1)

The method of claim 1, further comprising varying a parameter of at least one of corresponding parallel heterostructures of each of the alternating multichannel ridges.

### Claim 3 (depends on 2)

The method of claim 2, wherein the parameter is a dopant concentration.

### Claim 4 (depends on 2)

The method of claim 2, wherein the parameter is a dopant concentration for each heterostructure, such that longer width channels associated with a given heterostructure are doped with less dopant concentration than shorter width channels associated with a given heterostructure for each of the plurality of heterostructures to substantially equalize the pinch-off voltage of each channel of the SLCFET during operation.

### Claim 5 (depends on 2)

The method of claim 2, wherein the parameter is a thickness.

### Claim 6 (depends on 2)

The method of claim 2, wherein the parameter is a thickness, such that each inner heterostructure is formed with a greater thickness than a thickness of at least one of a top heterostructure and a bottom heterostructure for each of the alternating multichannel ridges.

### Claim 7 (depends on 2)

The method of claim 2, wherein the parameter is a thickness, such that every other inner heterostructure is formed with a greater thickness than a thickness of at least one of a top heterostructure and a bottom heterostructure for each of the alternating multichannel ridges.