# US 2017/0287907 A1 · 3d cross-point memory manufacturing process having limited lithography steps

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- Number: US 2017/0287907 A1
- Document ID: US20170287907A1
- Status: Published application
- Kind: A1
- Application number: 15/629,152
- Filed: 2017-06-21
- Published: 2017-10-05
- Earliest claimed: 2016-03-24
- Assignees: Western Digital Technologies, Inc.
- Applicants: Western Digital Technologies, Inc.
- Inventors: Mac D. APODACA; Daniel Robert SHEPARD
- Web page: https://patentgrep.com/patent/US20170287907A1

## CPC

- H10D 88/00: Three-dimensional [3D] integrated devices
- H10B 63/80: {Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays}
- H10D 1/00: Resistors, capacitors or inductors
- H10D 62/115: {Dielectric isolations, e.g. air gaps}
- H10W 20/42: Vias, e.g. via plugs
- H10W 20/43: Layouts of interconnections
- H10W 20/4441: {the principal metal being a refractory metal}
- H10W 20/4446: {Refractory-metal alloys}
- H10D 62/117: {Shapes of semiconductor bodies}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10B: ELECTRONIC MEMORY DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

The present disclosure generally relates to semiconductor manufactured memory devices and methods of manufacture thereof. More specifically, methods for forming a plurality of layers of a 3D cross-point memory array without the need for lithographic patterning at each layer are disclosed. The method includes depositing a patterned hard mask with a plurality of first trenches over a plurality of layers. Each of the plurality of first trenches is etched all the way through the plurality of layers. Then the hard mask is patterned with a plurality of second trenches, which runs orthogonal to the plurality of first trenches. Selective undercut etching is then used to remove each of the plurality of layers except the orthogonal metal layers from the plurality of second trenches, resulting in a 3D cross-point array with memory material only at the intersections of the orthogonal metal layers.

## Claims

### Claim 1

A method, comprising:
depositing a plurality of layers on a substrate;
depositing a first amount of hard mask material over the plurality of layers;
forming a plurality of first trenches in the hard mask material;
etching the plurality of first trenches down to the substrate;
filling the plurality of first trenches with a first dielectric material;
etching the first dielectric material to a level below a top surface of the hard mask material;
depositing a second amount of hard mask material over the first amount of hard mask material and the first dielectric material;
forming a plurality of second trenches in the hard mask material, wherein the plurality of second trenches runs orthogonal to the plurality of first trenches; and
etching a plurality of holes between the plurality of first trenches and the plurality of second trenches down to the substrate.

### Claim 2 (depends on 1)

The method of claim 1, wherein the plurality of layers comprises:
a first metal layer comprising a first metal material;
a selector layer;
a memory element layer; and
a second metal layer comprising a second metal material.

### Claim 3 (depends on 2)

The method of claim 2, further comprising:
depositing a third amount of hard mask material over the second amount of hard mask material;
undercut etching the selector layer, the memory element layer, and the second metal layer;
filling the plurality of holes and the plurality of second trenches with a second dielectric material;
etching the second dielectric material down to about a top surface of the first hard mask material;
depositing a fourth amount of hard mask material over the third amount of hard mask material; and
planarizing the fourth amount of hard mask material down to expose a top surface of the first dielectric material.

### Claim 4 (depends on 3)

The method of claim 3, further comprising etching the first dielectric material down to a bottom surface of the second metal layer;
depositing a fifth amount of hard mask material over the fourth amount of hard mask material;
etching the first dielectric material down to a bottom surface of the second metal layer;
laterally etching a first wall and a second wall of the first dielectric material between a top surface and the bottom surface of the second metal layer;
filling the plurality of first trenches with the second metal material; and
etching the second metal material down to the top surface of the second metal layer.

### Claim 5 (depends on 4)

The method of claim 4, further comprising:
removing the hard mask material.

### Claim 6 (depends on 5)

The method of claim 5, further comprising:
depositing a third dielectric material over a top surface of the plurality of layers.

### Claim 7 (depends on 6)

The method of claim 6, further comprising:
planarizing the top surface of the plurality of layers.

### Claim 8 (depends on 1)

The method of claim 1, wherein plurality of layers comprises:
a first metal layer comprising a first metal material;
a selector layer;
a memory element layer; and
a second metal layer having a first portion and a second portion wherein the second metal portion comprises a second metal material.

### Claim 9 (depends on 8)

The method of claim 8, wherein the first metal material comprises tungsten.

### Claim 10 (depends on 8)

The method of claim 8, wherein the selector layer comprises an ovonic threshold switch material.

### Claim 11 (depends on 8)

The method of claim 8, wherein the second metal material comprises titanium nitride.

### Claim 12 (depends on 8)

The method of claim 8, wherein the first portion and the second portion each comprise the second metal material.

### Claim 13

A method, comprising:
depositing a plurality of layers on a substrate, wherein the plurality of layers comprises:
a first metal layer comprising a first metal material;
a selector layer;
a memory element layer; and
a second metal layer comprising a second metal material;
depositing a first amount of hard mask material over the plurality of layers, wherein the first amount of hard mask material has a plurality of first trenches filled with a first dielectric material and a plurality of second trenches, wherein the plurality of second trenches runs orthogonal to the plurality of first trenches, and a plurality of holes between the plurality of first trenches and the plurality of second trenches;
filling the plurality of holes and the plurality of second trenches with a second dielectric material;
depositing a second amount of hard mask material over the first amount of hard mask material and the first dielectric material;
planarizing the second hard mask material down to expose a top surface of the first dielectric material;
etching the first dielectric material to a level coplanar with a top surface of the second metal layer;
depositing a third amount of hard mask material over the second amount of hard mask material;
etching the first dielectric material down to a bottom surface of the second metal layer; and
laterally etching a first wall and a second wall of the first dielectric material between a top surface and the bottom surface of the second metal layer.

### Claim 14 (depends on 13)

The method of claim 13, further comprising:
filling the plurality of first trenches with a third metal material; and
etching the third metal material down to the top surface of the second metal layer.

### Claim 15 (depends on 14)

The method of claim 14, wherein etching the third metal material comprises selective dry etching.

### Claim 16 (depends on 14)

The method of claim 14, wherein the third metal material comprises Tungsten Nitride and Tungsten.

### Claim 17 (depends on 14)

The method of claim 14, further comprising:
removing the hard mask material.

### Claim 18 (depends on 17)

The method of claim 17, further comprising:
depositing a third dielectric material over a top surface of the plurality of layers.

### Claim 19 (depends on 18)

The method of claim 18, further comprising:
planarizing the top surface of the plurality of layers.

### Claim 20 (depends on 19)

The method of claim 19, further comprising:
forming a plurality of vias between the first metal layer and the second metal layer.