# US 2017/0287876 A1 · Method and device for controlling operation using temperature deviation in multi-chip package

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- Number: US 2017/0287876 A1
- Document ID: US20170287876A1
- Status: Published application
- Kind: A1
- Application number: 15/620,978
- Filed: 2017-06-13
- Published: 2017-10-05
- Earliest claimed: 2015-04-08
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: MIN-SANG PARK
- Web page: https://patentgrep.com/patent/US20170287876A1

## CPC

- H10W 90/00: Package configurations
- G06F 13/00: Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (interface circuits for specific input/output devices G06F3/00 {; multiprogram control therefor G06F9/46}; multiprocessor systems G06F15/16 )
- G11C 11/40626: {Temperature related aspects of refresh operations}
- H10W 40/00: Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60)
- H10W 72/551: {Materials of bond wires}
- H10W 90/284: {characterised by structural arrangements for measuring or testing}
- H10W 90/288: {characterised by arrangements for thermal management of the stacked chips}
- H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips}
- H10W 90/753: {between laterally-adjacent chips}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A multi-chip package includes a first die having temperature sensors and a second die. The first die generates temperature deviation information of m (m<n) bits based on temperature information of n bits produced by the temperature sensors. The first die provides the temperature deviation information of m bits rather than the temperature information of n bits to the second die. An internal operation of the second die is controlled using the temperature deviation information output by the first die.

## Claims

### Claim at position 1

1-19. (canceled)

### Claim 20

A memory system comprising:
a memory controller configured to output a reference temperature of n bits; and
a memory package comprising:
a first die configured to receive the reference temperature and to output a first temperature deviation information of m bits by comparing the reference temperature with a first temperature information which is generated by a temperature sensor disposed in the first die; and
a second die packaged with the first die within the memory package, the second die being operatively connected to the first die to receive the first temperature deviation information from the first die, and being configured to perform an internal operation based on the first temperature deviation information,
wherein m is less than n, n is a natural number equal to or greater than two, and
wherein the first die and the second die exchange signals via through silicon vias (TSVs).

### Claim 21 (depends on 20)

The memory system of claim 20, wherein the memory package further includes a third die which is packaged within the memory package, and the third die is configured to receive the first temperature deviation information from the first die and to perform an internal operation based on the first temperature deviation information.

### Claim 22 (depends on 21)

The memory system of claim 21, wherein the first die is a logic die and the second and third dies are memory dies.

### Claim 23 (depends on 22)

The memory system of claim 22, wherein the second and third dies are double data rate (DDR) SDRAM devices.

### Claim 24 (depends on 23)

The memory system of claim 23, wherein the memory dies are vertically stacked over the logic die.

### Claim 25 (depends on 24)

The memory system of claim 24, wherein the logic die and the memory dies exchange signals via through silicon vias (TSVs).

### Claim 26 (depends on 25)

The memory system of claim 25, wherein the logic die is configured to receive commands, addresses, clock signals, and data from the memory controller, and to provide a signal distribution function of providing the received commands, addresses, clocks, and data to the memory dies.

### Claim 27 (depends on 26)

The memory system of claim 26, wherein the first die includes a temperature deviation calculator, and the temperature deviation calculator is configured to calculate a difference between the first temperature information and the reference temperature to output the difference as the first temperature deviation information.

### Claim 28 (depends on 27)

The memory system of claim 27, wherein the second die includes an operation controller which control functions, characteristics, and modes of the second die by using the temperature deviation information provided by the first die.

### Claim 29 (depends on 28)

The memory system of claim 28, wherein operation controller controls at least one operating characteristics selected from the group consisting of a refresh operation, a DC level, and an AC timing of the second die based on the temperature deviation information.

### Claim 30 (depends on 29)

The memory system of claim 29, wherein the reference temperature from the memory controller is provided in real time.

### Claim 31 (depends on 20)

The memory system of claim 20, wherein the second die is configured to store a temperature compensation coefficient correlated with a structural characteristics of the packaged first and second dies, and control the internal operation of the second die based on the first temperature compensation information and the temperature compensation coefficient.

### Claim 32 (depends on 20)

The memory system of claim 20, wherein the second die comprises at least one second temperature sensor configured to sense a temperature of the second die.

### Claim 33 (depends on 32)

The memory system of claim 32, wherein the second die is configured to control the internal operation based on the first temperature deviation information and the temperature sensed by the second temperature sensor.

### Claim 34 (depends on 20)

The memory system of claim 20, wherein the second die comprises second temperature sensors that sense temperatures of the second die and output the sensed temperatures as second temperature information, and the second die is configured to calculate second temperature deviation information using the second temperature information.

### Claim 35

A memory system comprising:
a memory controller configured to output commands, addresses, clock signals, and data; and
a memory package comprising:
a first die including a substrate, first temperature sensors arrayed across the substrate which sense temperatures at areas of the substrate at which they are located and output information of the sensed temperatures, respectively, and a calculator operatively connected to the temperature sensors to receive the information output by the temperature sensors and configured to produce first temperature information based on the information output by the temperature sensors, and the first die is configured to receive commands, addresses, clock signals, and data from the memory controller, the first die further configured to receive the commands, the addresses, the clocks, and the data from the memory controller and to provide a signal distribution function of providing to the memory dies; and
a second die packaged with the first die which is vertically stacked over the first die and exchange signals with the first die via through silicon vias (TSVs), the second die including an operation controller operatively connected to the calculator of the first die, and circuitry that performs an internal operation that is temperature dependent, the circuitry being operatively connected to the operation controller,
wherein the operation controller is configured to control at least one parameter of the internal operation of the second die on the basis of the first temperature information produced by the first die.

### Claim 36 (depends on 35)

The memory system of claim 35, wherein the calculator of the first die is configured to calculate a difference between the highest temperature and the lowest temperature constituting the first temperature information and output the difference as the first temperature information.

### Claim 37 (depends on 35)

The memory system of claim 35, wherein the circuitry of the second die comprises a memory cell array, and said at least one parameter is selected from the group consisting of the duration of refresh operations of rows of the memory cells of the array, a DC voltage level of the second die, and an AC timing of the second die.

### Claim 38 (depends on 37)

The memory system of claim 37, wherein the second die is further configured to store a temperature compensation coefficient correlated with a structural characteristic of the packaged first and second dies, the second die includes a calculator configured to factor the temperature compensation coefficient into the first temperature information, and the operation controller of the second die is operatively connected to the calculator of the second die so as to control the at least one parameter of the internal operation of the second die based on the first temperature information and the temperature compensation coefficient.

### Claim 39 (depends on 38)

The memory system of claim 38, wherein the second die comprises at least one temperature sensor configured to sense a temperature of the second die, and
wherein the operation controller of the second die is operatively connected to the at least one temperature sensor of the second die, and is configured to control the at least one parameter of the internal operation of the second die based on the first temperature information and information output by the at least one temperature sensor of the second die wherein the second die is configured to control the internal operation based on the first temperature deviation information and the temperature sensed by the second temperature sensor.