# US 2017/0287808 A1 · Dual-sided die packages > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2017/0287808 A1 - Document ID: US20170287808A1 - Status: Published application - Kind: A1 - Application number: 15/625,947 - Filed: 2017-06-16 - Published: 2017-10-05 - Earliest claimed: 2016-02-26 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Henning BRAUNISCH; Feras EID; Adel A. ELSHERBINI; Johanna M. SWAN; Don W. NELSON - Web page: https://patentgrep.com/patent/US20170287808A1 ## CPC - H10W 40/22: characterised by their shape, e.g. having conical or cylindrical projections - H05K 1/021: {Components thermally connected to metal substrates or heat-sinks by insert mounting} - H05K 1/185: associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards - H10W 40/228: {the projecting parts being wire-shaped or pin-shaped} - H10W 40/47: by flowing liquids, e.g. forced water cooling - H10W 70/614: {the multiple chips being integrally enclosed} - H10W 70/65: Shapes or dispositions of interconnections - H10W 72/00: Interconnections or connectors in packages - H10W 72/071: {Connecting or disconnecting} - H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H05K 2201/066: Heatsink mounted on the surface of the printed circuit board [PCB] - H05K 2201/10416: Metallic blocks or heatsinks completely inserted in a PCB - H05K 2201/10545: Related components mounted on both sides of the PCB - H10W 40/10: Arrangements for heating - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ## Abstract An apparatus including a die, a first side of the die including a first type of system level contact points and a second side including a second type of contact points; and a package substrate coupled to the die and the second side of the die. An apparatus including a die, a first side of the die including a plurality of system level logic contact points and a second side including a second plurality of system level power contact points. A method including coupling one of a first type of system level contact points on a first side of a die and a second type of system level contact points on a second side of the die to a package substrate. ## Claims ### Claim 1 A semiconductor device assembly apparatus comprising: a die comprising a first side and an opposite second side, the first side comprising a first type of system level contact points and the second side comprising a second type of system level contact points; and a package substrate coupled to one of the first side of the die and the second side of the die. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the first type of system level contact points comprise logic input/output contact points. ### Claim 3 (depends on 2) The apparatus of claim 2, wherein the second type of system level contact points comprise power contact points. ### Claim 4 (depends on 1) The apparatus of claim 1, further comprising a heat exchanger coupled to one of the first side of the die and the second side of the die, wherein the package substrate and the heat exchanger are coupled on the same side of the die. ### Claim 5 (depends on 1) The apparatus of claim 1, further comprising a heat exchanger coupled to one of the first side of the die and the second side of the die, wherein the package substrate and the heat exchanger are coupled on opposite sides of the die. ### Claim 6 (depends on 2) The apparatus of claim 2, wherein the package substrate is coupled to the second side of the die and ones of the logic input/output contact points are coupled to the package substrate through an interposer. ### Claim 7 (depends on 2) The apparatus of claim 2, wherein the package substrate is coupled to the second side of the die and ones of the logic input/output contact points are coupled to the package substrate through a cable. ### Claim 8 (depends on 7) The apparatus of claim 7, wherein the ones of the logic input/output contact points comprise a first plurality of logic input/output contact points, the apparatus comprising a second plurality of logic input/output contact points disposed on the second side of the die. ### Claim 9 (depends on 8) The apparatus of claim 8, wherein signals associated with the first plurality of logic input/output contact points are faster than signals associated with the second plurality of logic input/output contact points. ### Claim 10 (depends on 1) The apparatus of claim 1, further comprising a system board, wherein the package substrate is coupled to the system board. ### Claim 11 (depends on 1) The apparatus of claim 1, further comprising a heat exchanger coupled to one of the first side of the die and the second side of the die, wherein the system board has an opening and one of the package substrate and the heat exchanger is disposed in the opening. ### Claim 12 A semiconductor device assembly apparatus comprising: a die comprising a first side and a second side, the first side comprising a plurality of system level logic contact points and the second side comprising a second plurality of system level power contact points comprising a function different than the first plurality of system level contact points. ### Claim 13 (depends on 12) The apparatus of claim 12, further comprising a package substrate coupled to one of the first side of the die and the second side of the die, wherein when the package substrate is coupled to the second side of the die, the plurality of logic contact points are coupled to the package substrate through one of an interposer and a cable. ### Claim 14 (depends on 13) The apparatus of claim 13, wherein the package substrate is coupled to the second side of the die and the logic contact points comprise a first plurality of logic contact points, the apparatus further comprising a second plurality of logic input/output contact points disposed on the second side of the die. ### Claim 15 (depends on 13) The apparatus of claim 13, further comprising a system board, wherein the package substrate is coupled to the system board. ### Claim 16 (depends on 15) The apparatus of claim 15, further comprising a heat exchanger coupled to one of the first side of the die and the second side of the die, wherein the system board has an opening and one of the package substrate and the heat exchanger is disposed in the opening. ### Claim 17 A method of forming an assembly apparatus comprising: coupling one of a first type of system level contact points on a first side of a die and a second type of system level contact points on a second side of the die to a package substrate. ### Claim 18 (depends on 17) The method of claim 17, further comprising coupling one of the first type of system level contact points and the second type of system level contact points to a heat exchanger and coupling the package substrate to a system board, wherein the package substrate and the heat exchanger are coupled on opposite sides of the die. ### Claim 19 (depends on 17) The method of claim 17, further comprising coupling the package to a system board. ### Claim 20 (depends on 19) The method of claim 19, further comprising coupling one of the first type of system level contact points and the second type of system level contact points to a heat exchanger, wherein the system board has an opening and one of the package substrate and the heat exchanger is disposed in the opening. ### Claim 21 (depends on 17) A processor system formed by the method of claim 17.