# US 2017/0287783 A1 · Semiconductor device manufacturing method

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- Number: US 2017/0287783 A1
- Document ID: US20170287783A1
- Status: Published application
- Kind: A1
- Application number: 15/416,390
- Filed: 2017-01-26
- Published: 2017-10-05
- Earliest claimed: 2016-03-30
- Assignees: Renesas Electronics Corporation
- Applicants: Renesas Electronics Corporation
- Inventors: Yoshihiko SHIMANUKI
- Web page: https://patentgrep.com/patent/US20170287783A1

## CPC

- H10P 54/00: Cutting or separating of wafers, substrates or parts of devices
- H10P 72/1912: {characterised by shock absorbing elements, e.g. retainers or cushions}
- H10P 72/1926: {characterised by the presence of atmosphere modifying elements inside or attached to the closed carrier}
- H10P 72/7402: {Wafer tapes, e.g. grinding or dicing support tapes}
- H10P 72/78: using vacuum or suction, e.g. Bernoulli chucks
- H10W 46/00: Marks applied to devices, e.g. for alignment or identification
- H10W 74/014: {using batch processing}
- H10P 72/7416: {used during dicing or grinding}
- H10P 72/7422: {used to protect an active side of a device or wafer}
- H10P 72/7434: {used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate}
- H10W 46/503: {Located in scribe lines}
- H10W 72/073: {of die-attach connectors}
- H10W 72/075: {of bond wires}
- H10W 72/536: {the connected ends being ball-shaped}
- H10W 72/5363: {the connected ends being wedge-shaped}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/90: Bond pads, in general
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device manufacturing method which improves working efficiency. The method includes the step of transporting by air a package as a sealed moisture-proof bag which contains a case housing a semiconductor wafer laminate, in which the semiconductor wafer laminate has a plurality of semiconductor wafers stacked with a protective sheet interposed between semiconductor wafers. In order to facilitate separation of the protective sheet from the semiconductor wafers after unpacking the package, the protective sheet has a plurality of convex parts, a plurality of concave parts, and a flat part between a convex part and a concave part. A hole penetrating the protective sheet is made in each convex part and the center of the hole is located off the apex of the convex part.

## Claims

### Claim 1

A semiconductor device manufacturing method comprising the steps of:
(a) providing a plurality of semiconductor wafers each having a plurality of chip regions arranged in a matrix pattern over a main surface of a semiconductor substrate and scribe regions arranged between the chip regions in a lattice pattern;
(b) sealing a semiconductor wafer laminate in which the semiconductor wafers are stacked with a protective sheet interposed between semiconductor wafers, in a moisture-proof bag to package the semiconductor wafer laminate;
(c) transporting the packaged semiconductor wafer laminate by air;
(d) taking the semiconductor wafer laminate out of the moisture-proof bag and then sucking and moving a first semiconductor wafer of the semiconductor wafer laminate to a stage by a first suction unit and attaching a tape to a back surface of the first semiconductor wafer; and
(e) forming a plurality of semiconductor chips by cutting the first semiconductor wafer along the scribe regions,
wherein the protective sheet has a first surface and a second surface opposite to the first surface and the first surface has a flat part, a plurality of convex parts projecting from the flat part toward the first surface, and a plurality of concave parts projecting from the flat part toward the second surface,
wherein a first hole penetrating the protective sheet is made in the convex part, and
wherein a center of the first hole is located off an apex of the convex part in plan view.

### Claim 2 (depends on 1)

The semiconductor device manufacturing method according to claim 1, wherein the first hole is made in a slope between the apex and the flat part and the first hole does not reach the apex.

### Claim 3 (depends on 2)

The semiconductor device manufacturing method according to claim 2, wherein the first hole is oval in plan view.

### Claim 4 (depends on 2)

The semiconductor device manufacturing method according to claim 2, wherein the first hole is a slit in plan view.

### Claim 5 (depends on 1)

The semiconductor device manufacturing method according to claim 1, wherein the first hole is circular in plan view.

### Claim 6 (depends on 1)

The semiconductor device manufacturing method according to claim 1, wherein a second hole penetrating the protective sheet is made in the concave part.

### Claim 7 (depends on 1)

The semiconductor device manufacturing method according to claim 1, wherein the semiconductor wafer laminate has the first semiconductor wafer and a second semiconductor wafer which are arranged in a manner to sandwich the protective sheet and the protective sheet lies between the main surface of the first semiconductor wafer and the back surface of the second semiconductor wafer.

### Claim 8 (depends on 7)

The semiconductor device manufacturing method according to claim 7, the step (d) comprising the step of:
(d-1) moving the first semiconductor wafer and then removing the protective sheet by a second suction unit to expose a back surface of the second semiconductor wafer.

### Claim 9 (depends on 1)

The semiconductor device manufacturing method according to claim 1, wherein a resin film is formed over the main surface of the semiconductor wafer.

### Claim 10

A semiconductor device manufacturing method comprising the steps of:
(a) providing a first semiconductor wafer and a second semiconductor wafer each having a plurality of chip regions arranged in a matrix pattern over a main surface of a semiconductor substrate and scribe regions arranged between the chip regions in a lattice pattern;
(b) attaching a first tape to the main surface of the first semiconductor wafer and a second tape to the main surface of the second semiconductor wafer and then polishing back surfaces of the first semiconductor wafer and the second semiconductor wafer;
(c) putting a semiconductor wafer laminate with a protective sheet interposed between the first tape over the main surface of the first semiconductor wafer and the back surface of the second semiconductor wafer, in a moisture-proof bag and sealing the semiconductor wafer laminate in the moisture-proof bag to package the semiconductor wafer laminate;
(d) transporting the packaged semiconductor wafer laminate by air;
(e) taking the semiconductor wafer laminate out of the moisture-proof bag and then sucking the back surface of the first semiconductor wafer by a first suction unit, moving the first semiconductor wafer and the first tape onto a stage and attaching a third tape to the back surface of the first semiconductor wafer;
(f) peeling the first tape from the first semiconductor wafer to expose the main surface of the first semiconductor wafer; and
(g) forming a plurality of semiconductor chips by cutting the first semiconductor wafer along the scribe regions,
wherein the protective sheet has a first surface and a second surface opposite to the first surface and the first surface has a flat part, a plurality of convex parts projecting from the flat part toward the first surface, and a plurality of concave parts projecting from the flat part toward the second surface,
wherein a first hole penetrating the protective sheet is made in the convex part, and
wherein a center of the first hole is closer to a periphery of the convex part than to an apex of the convex part in plan view.

### Claim 11 (depends on 10)

The semiconductor device manufacturing method according to claim 10, wherein the first hole is made in a slope between the apex and the flat part and the first hole does not reach the apex.

### Claim 12 (depends on 10)

The semiconductor device manufacturing method according to claim 10, wherein a second hole penetrating the protective sheet is made in the concave part.

### Claim 13 (depends on 10)

The semiconductor device manufacturing method according to claim 10, the step (e) comprising the step of:
(e-1) moving the first semiconductor wafer and the first tape and then removing the protective sheet by a second suction unit to expose the back surface of the second semiconductor wafer.

### Claim 14

A semiconductor device manufacturing method comprising the steps of:
(a) providing a plurality of semiconductor wafers each having a plurality of chip regions arranged in a matrix pattern over a main surface of a semiconductor substrate and scribe regions arranged between the chip regions in a lattice pattern;
(b) sealing a semiconductor wafer laminate in which the semiconductor wafers are stacked with a protective sheet interposed between semiconductor wafers, in a moisture-proof bag to package the semiconductor wafer laminate;
(c) transporting the packaged semiconductor wafer laminate by air;
(d) taking the semiconductor wafer laminate out of the moisture-proof bag and then sucking and moving a first semiconductor wafer of the semiconductor wafer laminate to a stage by a first suction unit and attaching a tape to a back surface of the first semiconductor wafer; and
(e) forming a plurality of semiconductor chips by cutting the first semiconductor wafer along the scribe regions,
wherein the protective sheet has a first surface and a second surface opposite to the first surface and the first surface has a flat part, a plurality of convex parts projecting from the flat part toward the first surface, and a plurality of concave parts projecting from the flat part toward the second surface, and
wherein a first hole penetrating the protective sheet is made between an apex of the convex part and the flat part.
