# US 2017/0287729 A1 · Process for packaging circuit component having copper circuits with solid electrical and thermal conductivities and circuit component thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2017/0287729 A1 - Document ID: US20170287729A1 - Status: Published application - Kind: A1 - Application number: 15/474,332 - Filed: 2017-03-30 - Published: 2017-10-05 - Earliest claimed: 2016-03-30 - Inventors: Chih-liang HU - Web page: https://patentgrep.com/patent/US20170287729A1 ## CPC - H10W 76/138: having another interconnection being formed by a cover plate parallel to the conductive base, e.g. sandwich type - H10W 20/40: Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes - H10W 70/023: {Connecting or disconnecting interconnections thereto or therefrom, e.g. connecting bond wires or bumps} - H10W 70/027: {Mechanical treatments, e.g. deforming, punching or cutting} - H10W 70/095: {of vias therein} - H10W 70/098: {Applying pastes or inks, e.g. screen printing (H10W70/095 takes precedence)} - H10W 70/635: {Through-vias} - H10W 70/69: Insulating materials thereof - H10W 74/01: Manufacture or treatment - H10W 76/01: Manufacture or treatment - H10W 76/136: having other interconnections perpendicular to the conductive base - H10W 76/42: Fillings - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W 72/0198: {batch processes} - H10W 72/07354: {changes in dispositions} - H10W 72/347: {Dispositions of multiple die-attach connectors} - H10W 74/111: {the semiconductor body being completely enclosed} - H10W 74/121: {by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation} - H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A method for packaging a circuit component, comprising: forming a first protruding pad on a first copper substrate and a through-hole in the first protruding pad; forming a second protruding pad on a second copper substrate and placing a circuit dice of the circuit component on the second protruding pad having a conductive paste coated thereon wherein a first electrode of the dice facing the second protruding pad; stacking the first copper substrate onto the second copper substrate with the first protruding pad having a conductive paste coated thereon aligned and pressing onto the circuit dice placed on the second protruding pad wherein a second electrode of the dice facing the first protruding pad; inserting a copper rod tightly into the through-hole until contacting with a conductive paste coated on the second substrate; heat-treating the stacked structure for the circuit dice and the copper rod to form secured electrical connection with the first and second copper substrates respectively and further forming a hermetic seal in the space between the first and second copper substrates; and using the hermetic seal as a rigid processing structure, etching the exposed surface of the first and second copper substrates to remove the entire thickness of copper other than in the area of the first and second protruding pads and in the area other than where the copper rod connects to the second copper substrate, thereby forming the device terminals of the circuit component package. ## Claims ### Claim 1 A method for packaging a circuit component, comprising: forming a first protruding pad on a first copper substrate and a through-hole in the first protruding pad; forming a second protruding pad on a second copper substrate and placing a circuit dice of the circuit component on the second protruding pad having a conductive paste coated thereon wherein a first electrode of the dice facing the second protruding pad; stacking the first copper substrate onto the second copper substrate with the first protruding pad having a conductive paste coated thereon aligned and pressing onto the circuit dice placed on the second protruding pad wherein a second electrode of the dice facing the first protruding pad; inserting a copper rod tightly into the through-hole until contacting with a conductive paste coated on the second substrate; heat-treating the stacked structure for the circuit dice and the copper rod to form secured electrical connection with the first and second copper substrates respectively and further forming a hermetic seal in the space between the first and second copper substrates; and using the hermetic seal as a rigid processing structure, etching the exposed surface of the first and second copper substrates to remove the entire thickness of copper other than in the area of the first and second protruding pads and in the area other than where the copper rod connects to the second copper substrate, thereby forming the device terminals of the circuit component package. ### Claim 2 (depends on 1) The method of claim 1, wherein the circuit component is a diode. ### Claim 3 (depends on 1) The method of claim 1, wherein the at least one copper rod is a cylindrical rod. ### Claim 4 (depends on 1) The method of claim 1, wherein the at least one copper rod is polygonal rod. ### Claim 5 (depends on 1) The method of claim 1, wherein the at least one through-hole is formed by mechanical drilling. ### Claim 6 A method for packaging a circuit component, comprising: forming a first protruding pad on a first copper substrate; forming a second protruding pad on a second copper substrate and placing a circuit dice of the circuit component on the second protruding pad having a conductive paste coated thereon wherein a first electrode of the dice facing the second protruding pad; placing a copper block on the second copper substrate at a position beside where the dice is placed and having a conductive paste coated thereon; stacking the first copper substrate onto the second copper substrate with the first protruding pad having a conductive paste coated thereon aligned and pressing onto the circuit dice and the copper block wherein a second electrode of the dice facing the first protruding pad; heat-treating the stacked structure for the circuit dice and the copper block to form secured electrical connection with the first and second copper substrates respectively and further forming a hermetic seal in the space between the first and second copper substrates; and using the hermetic seal as a rigid processing structure, etching the exposed surface of the first and second copper substrates to remove the entire thickness of copper other than in the area of the first and second protruding pads and in the area other than where the copper block connects to the second copper substrate, thereby forming the device terminals of the circuit component package.