# US 2017/0286584 A1 · Custom layout of integrated circuit (ic) designs

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- Number: US 2017/0286584 A1
- Document ID: US20170286584A1
- Status: Published application
- Kind: A1
- Application number: 15/084,094
- Filed: 2016-03-29
- Published: 2017-10-05
- Earliest claimed: 2016-03-29
- Assignees: Synopsys, Inc.
- Applicants: Synopsys, Inc.
- Inventors: Robert B. Lefferts
- Web page: https://patentgrep.com/patent/US20170286584A1

## CPC

- G06F 30/31: Design entry, e.g. editors specifically adapted for circuit design
- G06F 30/392: Floor-planning or layout, e.g. partitioning or placement
- G06F 30/394: Routing (G06F30/396 takes precedence)
- G06F 30/398: Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36)
- G06F 2111/16: Customisation or personalisation
- H10D 84/834: {comprising FinFETs}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

Systems and techniques for facilitating layout of an integrated circuit (IC) design are described. A distinct color pattern can be assigned to a set of shapes in a layout of the IC design that correspond to a net. Next, the layout of the IC design can be displayed in a graphical user interface (GUI) of the IC design tool. Some embodiments can move a diffusion region of a multigate device with respect to the location of the device contacts so that the diffusion region is aligned with respect to a set of fin tracks, wherein each fin of each multigate device is located on a fin track.

## Claims

### Claim 1

A method for facilitating custom layout of an IC design, the method comprising:
for each net in a set of nets in the IC design, assigning a distinct color pattern to a set of shapes in a layout of the IC design that correspond to the net, wherein each shape in the set of shapes corresponds to a physical structure in an IC chip that can be manufactured based on the IC design; and
displaying the layout of the IC design in a graphical user interface (GUI) of the IC design tool, wherein each shape in the layout of the IC design is displayed in the GUI of the IC design tool using the color pattern assigned to the shape.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
displaying a set of GUI objects in the layout of the IC design for cutting shapes in the layout of the IC design, wherein each GUI object in the set of GUI objects corresponds to a location in the layout of the IC design where at least one shape can be cut, and wherein a short between two nets corresponds to two abutting shapes in the layout of the IC design that are colored using two distinct color patterns; and
for each GUI object that was selected by a user, cutting at least one shape at a location corresponding to the selected GUI object.

### Claim 3 (depends on 1)

The method of claim 1, further comprising:
displaying a set of GUI objects in the layout of the IC design for creating electrical contacts, wherein each GUI object in the set of GUI objects corresponds to a shape in the layout of the IC design; and
creating an electrical contact at each shape corresponding to each GUI object that was selected by a user.

### Claim 4 (depends on 3)

The method of claim 3, further comprising:
using a router to create electrical connections between electrical contacts that were created by the user by selecting the corresponding GUI objects.

### Claim 5 (depends on 1)

The method of claim 1, wherein each color pattern is a combination of a color and a pattern.

### Claim 6

A non-transitory computer-readable storage medium storing instructions that, when executed by a computer, cause the computer to perform a method for facilitating custom layout of an integrated circuit (IC) design, the method comprising:
for each net in a set of nets in the IC design, assigning a distinct color pattern to a set of shapes in a layout of the IC design that correspond to the net, wherein each shape in the set of shapes corresponds to a physical structure in an IC chip that can be manufactured based on the IC design; and
displaying the layout of the IC design in a graphical user interface (GUI) of the IC design tool, wherein each shape in the layout of the IC design is displayed in the GUI of the IC design tool using the color pattern assigned to the shape.

### Claim 7 (depends on 6)

The non-transitory computer-readable storage medium of claim 6, further comprising:
displaying a set of GUI objects in the layout of the IC design for cutting shapes in the layout of the IC design, wherein each GUI object in the set of GUI objects corresponds to a location in the layout of the IC design where at least one shape can be cut, and wherein a short between two nets corresponds to two abutting shapes in the layout of the IC design that are colored using two distinct color patterns; and
for each GUI object that was selected by a user, cutting at least one shape at a location corresponding to the selected GUI object.

### Claim 8 (depends on 6)

The non-transitory computer-readable storage medium of claim 6, further comprising:
displaying a set of GUI objects in the layout of the IC design for creating electrical contacts, wherein each GUI object in the set of GUI objects corresponds to a shape in the layout of the IC design; and
creating an electrical contact at each shape corresponding to each GUI object that was selected by a user.

### Claim 9 (depends on 8)

The non-transitory computer-readable storage medium of claim 8, further comprising:
using a router to create electrical connections between electrical contacts that were created by the user by selecting the corresponding GUI objects.

### Claim 10 (depends on 6)

The non-transitory computer-readable storage medium of claim 6, wherein each color pattern is a combination of a color and a pattern.

### Claim 11

A method for facilitating custom layout of multigate devices, the method comprising:
placing a multigate device in an IC design layout so that a device contact of the multigate device is aligned with respect to a set of interconnection tracks, wherein electrical connections between circuit elements in the IC design layout are routed along interconnection tracks; and
moving a diffusion region of the multigate device with respect to the location of the device contact so that the diffusion region is aligned with respect to a set of fin tracks, wherein each fin of each multigate device is located on a fin track.

### Claim 12 (depends on 11)

The method of claim 11, wherein adjacent interconnection tracks in the set of interconnection tracks are a first distance apart from each other, wherein adjacent fin tracks in the set of fin tracks are a second distance apart from each other.

### Claim 13 (depends on 12)

The method of claim 12, wherein the multigate device is a fin field effect transistor (FinFET), and wherein the second distance is not equal to the first distance.

### Claim 14 (depends on 11)

The method of claim 11, further comprising coloring shapes in the IC design layout with one or more color patterns, wherein shapes that are to be electrically connected with one another are colored using the same color pattern.

### Claim 15 (depends on 11)

The method of claim 11, further comprising displaying graphical user interface (GUI) objects in the IC design layout for creating electrical contacts with one or more shapes in one or more multigate devices.

### Claim 16 (depends on 15)

The method of claim 15, further comprising creating an electrical contact at each GUI object that was selected by a user.

### Claim 17 (depends on 16)

The method of claim 16, further comprising using a router to create electrical connections between electrical contacts in the IC design layout.

### Claim 18 (depends on 11)

The method of claim 11, further comprising displaying graphical user interface (GUI) objects in the IC design layout for cutting a polysilicon shape in the multigate device.

### Claim 19 (depends on 18)

The method of claim 18, further comprising cutting, at a GUI object, a polysilicon shape in the multigate device upon receiving a selection of the GUI object.

### Claim 20 (depends on 11)

The method of claim 11, wherein the multigate device is represented by a parameterized cell that includes parameters for source, drain, and gate connection locations and parameters for device dimensions, wherein each parameter value is specified as a multiple of the first distance.