# US 2017/0286314 A1 · Hardware-based translation lookaside buffer (tlb) invalidation

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- Number: US 2017/0286314 A1
- Document ID: US20170286314A1
- Status: Published application
- Kind: A1
- Application number: 15/084,886
- Filed: 2016-03-30
- Published: 2017-10-05
- Earliest claimed: 2016-03-30
- Assignees: QUALCOMM Incorporated
- Applicants: QUALCOMM Incorporated
- Inventors: Assaf Shacham; Shaul Yohai Yifrach; Thomas Zeng
- Web page: https://patentgrep.com/patent/US20170286314A1

## CPC

- G06F 12/1027: using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F 3/0619: {in relation to data integrity, e.g. data losses, bit errors}
- G06F 3/064: {Management of blocks}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0673: {Single storage device}
- G06F 12/1081: for peripheral access to main memory, e.g. direct memory access [DMA]
- G06F 13/28: using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (G06F13/32 takes precedence)
- G06F 12/0891: using clearing, invalidating or resetting means
- G06F 2212/1024: Latency reduction
- G06F 2212/1028: Power efficiency
- G06F 2212/683: Invalidation
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

Hardware-based translation lookaside buffer (TLB) invalidation techniques are disclosed. A host system is configured to exchange data with a peripheral component interconnect express (PCIe) endpoint (EP). A memory management unit (MMU), which is a hardware element, is included in the host system to provide address translation according to at least one TLB. In one aspect, the MMU is configured to invalidate the at least one TLB in response to receiving at least one TLB invalidation command from the PCIe EP. In another aspect, the PCIe EP is configured to determine that the at least one TLB needs to be invalidated and provide the TLB invalidation command to invalidate the at least one TLB. By implementing hardware-based TLB invalidation in the host system, it is possible to reduce TLB invalidation delay, thus leading to increased data throughput, reduced power consumption, and improved user experience.

## Claims

### Claim 1

A host system, comprising:
at least one processor coupled to a system bus;
a memory controller coupled to the system bus and configured to control a memory; and
a memory management unit (MMU) comprising at least one translation lookaside buffer (TLB), the MMU coupled to the system bus and configured to invalidate the at least one TLB in response to receiving at least one TLB invalidation command from a peripheral component interconnect express (PCIe) endpoint (EP).

### Claim 2 (depends on 1)

The host system of claim 1 further comprising a PCIe root complex (RC) coupled to the MMU and the PCIe EP, the PCIe RC configured to:
receive the at least one TLB invalidation command from the PCIe EP; and
provide the at least one received TLB invalidation command to the MMU.

### Claim 3 (depends on 1)

The host system of claim 1, wherein the at least one TLB invalidation command is received in at least one PCIe transport layer packet (TLP) prefix.

### Claim 4 (depends on 1)

The host system of claim 1, wherein the at least one TLB invalidation command is received in at least one PCIe transport layer packet (TLP) header.

### Claim 5 (depends on 1)

The host system of claim 1 further comprising the PCIe EP.

### Claim 6 (depends on 1)

The host system of claim 1, wherein the PCIe EP is a Wi-Fi communication integrated circuit (IC).

### Claim 7 (depends on 1)

The host system of claim 1 provided in an integrated circuit (IC).

### Claim 8 (depends on 1)

The host system of claim 1 provided in a device selected from the group consisting of: a set top box; an entertainment unit; a navigation device; a communications device; a fixed location data unit; a mobile location data unit; a mobile phone; a cellular phone; a smart phone; a tablet; a phablet; a computer; a portable computer; a desktop computer; a personal digital assistant (PDA); a monitor; a computer monitor; a television; a tuner; a radio; a satellite radio; a music player; a digital music player; a portable music player; a digital video player; a video player; a digital video disc (DVD) player; a portable digital video player; and an automobile.

### Claim 9

A method for invalidating at least one translation lookaside buffer (TLB) in a host system, comprising:
receiving at least one TLB invalidation command from a peripheral component interconnect express (PCIe) endpoint (EP); and
invalidating the at least one TLB in response to receiving the at least one TLB invalidation command from the PCIe EP.

### Claim 10 (depends on 9)

The method of claim 9 comprising receiving the at least one TLB invalidation command by a PCIe root complex (RC) coupled to the PCIe EP.

### Claim 11 (depends on 9)

The method of claim 9 comprising receiving the at least one TLB invalidation command in at least one PCIe transport layer packet (TLP) prefix.

### Claim 12 (depends on 9)

The method of claim 9 comprising receiving the at least one TLB invalidation command in at least one PCIe transport layer packet (TLP) header.

### Claim 13

A peripheral component interconnect express (PCIe) endpoint (EP) comprising:
a host interface controller (HIC) communicatively coupled to a host system, wherein the HIC is configured to:
determine that at least one translation lookaside buffer (TLB) in the host system needs to be invalidated; and
provide at least one TLB invalidation command to the host system to invalidate the at least one TLB.

### Claim 14 (depends on 13)

The PCIe EP of claim 13, wherein the HIC is communicatively coupled to the host system by a PCIe root complex (RC) in the host system.

### Claim 15 (depends on 13)

The PCIe EP of claim 13, wherein the HIC is configured to provide the at least one TLB invalidation command in at least one PCIe transport layer packet (TLP) prefix.

### Claim 16 (depends on 13)

The PCIe EP of claim 13, wherein the HIC is configured to provide the at least one TLB invalidation command in at least one PCIe transport layer packet (TLP) header.

### Claim 17 (depends on 13)

The PCIe EP of claim 13 is comprised of a Wi-Fi communication integrated circuit (IC).

### Claim 18

A method for invalidating at least one translation lookaside buffer (TLB) in a host system, comprising:
determining at least one TLB in the host system that needs to be invalidated; and
providing at least one TLB invalidation command to the host system to invalidate the at least one TLB.

### Claim 19 (depends on 18)

The method of claim 18 comprising providing the at least one TLB invalidation command in at least one PCIe transport layer packet (TLP) prefix.

### Claim 20 (depends on 18)

The method of claim 18 comprising providing the at least one TLB invalidation command in at least one PCIe transport layer packet (TLP) header.