# US 2017/0286296 A1 · Managing synonyms in virtual-address caches > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2017/0286296 A1 - Document ID: US20170286296A1 - Status: Published application - Kind: A1 - Application number: 15/088,354 - Filed: 2016-04-01 - Published: 2017-10-05 - Earliest claimed: 2016-04-01 - Assignees: Cavium, Inc. - Applicants: Cavium, Inc. - Inventors: Shubhendu Sekhar Mukherjee - Web page: https://patentgrep.com/patent/US20170286296A1 ## CPC - G06F 12/0811: with multilevel cache hierarchies - G06F 12/0864: using pseudo-associative means, e.g. set-associative or hashing - G06F 12/1063: {the data cache being concurrently virtually addressed} - G06F 12/0848: {Partitioned cache, e.g. separate instruction and operand caches} - G06F 12/0855: Overlapped cache accessing, e.g. pipeline (G06F12/0846 takes precedence) - G06F 12/0871: Allocation or management of cache space - G06F 2212/1024: Latency reduction - G06F 2212/283: Plural cache memories - G06F 2212/6032: Way prediction in set-associative cache - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A virtual-address cache module receives at least a portion of a virtual address and in response indicates a hit or a miss. A first cache structure stores only memory blocks with virtual addresses that are members of a set of multiple synonym virtual addresses that have all been previously received by the virtual-address cache module during the operating period, where each member of a particular set of multiple synonym virtual addresses translates to a common physical address, and a memory block with the common physical address is stored in at most a single storage location within the first cache structure. A second cache structure stores only memory blocks with virtual addresses that do not have any synonym virtual addresses that have been previously received by the virtual-address cache during the operating period. ## Claims ### Claim 1 A method comprising: retrieving memory pages from a main memory based on virtual addresses translated to physical addresses; and storing, in one or more cache modules, copies of memory blocks from memory pages stored in the main memory; wherein the one or more cache modules include a virtual-address cache module that, during an operating period, receives at least a portion of a virtual address and in response indicates a hit if a corresponding virtual address is presently stored in the virtual-address cache module, and indicates a miss if a corresponding virtual address is not presently stored in the virtual-address cache module, wherein the virtual-address cache module includes: a first cache structure that stores only memory blocks with virtual addresses that are members of a set of multiple synonym virtual addresses that have all been previously received by the virtual-address cache module during the operating period, where each member of a particular set of multiple synonym virtual addresses translates to a common physical address, and a memory block with the common physical address is stored in at most a single storage location within the first cache structure; and a second cache structure that stores only memory blocks with virtual addresses that do not have any synonym virtual addresses that have been previously received by the virtual-address cache during the operating period. ### Claim 2 (depends on 1) The method of claim 1, wherein the virtual-address cache module is configured to receive at least a portion of a virtual address and in response indicate a hit if a corresponding virtual address is presently stored in the virtual-address cache module without requiring translation of the virtual address to a physical address before searching the first or second cache structures. ### Claim 3 (depends on 1) The method of claim 1, wherein the virtual-address cache module is configured to receive at least a portion of a virtual address and in response indicate a hit if a corresponding virtual address is presently stored in the virtual-address cache module without requiring translation of the virtual address to any potential synonym virtual address before searching the first or second cache structures. ### Claim 4 (depends on 1) The method of claim 1, wherein the virtual-address cache module is configured to receive at least a portion of a virtual address and in response indicate a hit if a corresponding virtual address is presently stored in the virtual-address cache module without requiring determination of whether or not the virtual address has any potential synonym virtual addresses before searching the first or second cache structures. ### Claim 5 (depends on 1) The method of claim 1, wherein the first cache structure includes multiple entries each including: a set of bits for a virtual tag corresponding to a portion of a virtual address of a stored copy of a memory block, a set of bits for a physical tag corresponding to a portion of a physical address of the stored copy of the memory block. ### Claim 6 (depends on 5) The method of claim 5, wherein the entries each include a set of bits for a storage location within the first cache structure of the stored copy of the memory block. ### Claim 7 (depends on 5) The method of claim 5, wherein the second cache structure includes multiple entries each including: a set of bits for a virtual tag corresponding to a portion of a virtual address of a stored copy of a memory block, a set of bits for a physical tag corresponding to a portion of a physical address of the stored copy of the memory block, and a set of bits for the stored copy of the memory block. ### Claim 8 (depends on 7) The method of claim 7, wherein the virtual-address cache module indicates a hit if a corresponding virtual address is presently stored in the virtual-address cache module, and indicates a miss if a corresponding virtual address is not presently stored in the virtual-address cache module, based at least in part on virtual tags in entries of the first cache structure and virtual tags in entries of the second cache structure. ### Claim 9 (depends on 8) The method of claim 8, wherein after indicating a miss due to a corresponding virtual address not being presently stored in the virtual-address cache module, the virtual-address cache module indicates a hit if a corresponding physical address is presently stored in the virtual-address cache module, and indicates a miss if a corresponding physical address is not presently stored in the virtual-address cache module, based at least in part on physical tags in entries of the first cache structure and physical tags in entries of the second cache structure. ### Claim 10 (depends on 1) The method of claim 1, wherein the virtual-address cache module is virtually tagged such that the virtual-address cache module determines whether to indicate a hit or a miss for a particular virtual address based on a tag that includes a portion of the particular virtual address and is compared with tags of multiple entries in at least one of the first or second cache structures. ### Claim 11 (depends on 10) The method of claim 10, wherein the virtual-address cache module is virtually indexed such that the virtual-address cache module determines whether to indicate a hit or a miss for a particular virtual address based on an index that includes a portion of the particular virtual address and is used to look up one of multiple entries or sets of entries in the second cache structure. ### Claim 12 (depends on 1) The method of claim 1, wherein the first cache structure is configured as a fully associative cache. ### Claim 13 (depends on 12) The method of claim 12, wherein the second cache structure is configured as a set associative cache with multiple cache sets and multiple cache ways. ### Claim 14 (depends on 13) The method of claim 13, wherein the virtual-address cache module determines whether to indicate a hit or a miss for a particular virtual address based on: (1) a first comparison of a first tag including a portion of the particular virtual address with tags of multiple entries in the first cache structure, and (2) a first lookup of an index including a portion of the particular virtual address to select one of multiple cache sets in the second cache structure, and a second comparison of a second tag including a portion of the particular virtual address with tags of multiple entries in the selected cache set. ### Claim 15 (depends on 14) The method of claim 14, wherein the first comparison and the first lookup are performed in parallel. ### Claim 16 (depends on 14) The method of claim 14, wherein the first comparison and the second comparison are performed in parallel. ### Claim 17 (depends on 1) The method of claim 1, wherein the first cache structure is configured as a set associative cache with multiple cache sets and multiple cache ways. ### Claim 18 (depends on 17) The method of claim 17, wherein the virtual-address cache module restricts each member of a particular set of multiple synonym virtual addresses to be stored in the same particular cache set of the multiple cache sets, unless that member is the only member of that particular set of multiple synonym virtual addresses that is currently stored in the first cache structure. ### Claim 19 An apparatus comprising: memory management circuitry configured to retrieve memory pages from a main memory based on virtual addresses translated to physical addresses; and a memory system including one or more cache modules that store copies of memory blocks from memory pages stored in the main memory; wherein the one or more cache modules include a virtual-address cache module that, during an operating period, receives at least a portion of a virtual address and in response indicates a hit if a corresponding virtual address is presently stored in the virtual-address cache module, and indicates a miss if a corresponding virtual address is not presently stored in the virtual-address cache module, wherein the virtual-address cache module includes: a first cache structure that stores only memory blocks with virtual addresses that are members of a set of multiple synonym virtual addresses that have all been previously received by the virtual-address cache module during the operating period, where each member of a particular set of multiple synonym virtual addresses translates to a common physical address, and a memory block with the common physical address is stored in at most a single storage location within the first cache structure; and a second cache structure that stores only memory blocks with virtual addresses that do not have any synonym virtual addresses that have been previously received by the virtual-address cache during the operating period. ### Claim 20 (depends on 19) The apparatus of claim 19, wherein the first cache structure includes multiple entries each including: a set of bits for a virtual tag corresponding to a portion of a virtual address of a stored copy of a memory block, a set of bits for a physical tag corresponding to a portion of a physical address of the stored copy of the memory block. ### Claim 21 (depends on 20) The apparatus of claim 20, wherein the entries each include a set of bits for a storage location within the first cache structure of the stored copy of the memory block. ### Claim 22 (depends on 20) The apparatus of claim 20, wherein the second cache structure includes multiple entries each including: a set of bits for a virtual tag corresponding to a portion of a virtual address of a stored copy of a memory block, a set of bits for a physical tag corresponding to a portion of a physical address of the stored copy of the memory block, and a set of bits for the stored copy of the memory block. ### Claim 23 (depends on 20) The apparatus of claim 20, wherein the entries each include a set of bits for one or more pointers to one or more members of the set of multiple synonym virtual addresses that have all been previously received by the virtual-address cache module during the operating period. ### Claim 24 (depends on 23) The apparatus of claim 23, wherein the one or more pointers each identify a cache set and a cache way, and the first cache structure is configured as a set associative cache with multiple cache sets and multiple cache ways. ### Claim 25 (depends on 20) The apparatus of claim 20, wherein each synonym virtual address in the same set of multiple synonym virtual addresses that each translates to a common physical address is stored in a different entry in the first cache structure, and each of the different entries stores the same physical tag and the same storage location of the stored copy of the memory block having the common physical address. ### Claim 26 (depends on 19) The apparatus of claim 19, wherein the first cache structure includes multiple entries each corresponding to different members of sets of multiple synonym virtual addresses, and the virtual-address cache module has a limit on a maximum number of members of any particular set of multiple synonym virtual addresses that can be stored in entries of the first cache structure at the same time. ### Claim 27 (depends on 19) The apparatus of claim 19, wherein the virtual-address cache module is virtually tagged such that the virtual-address cache module determines whether to indicate a hit or a miss for a particular virtual address based on a tag that includes a portion of the particular virtual address and is compared with tags of multiple entries in at least one of the first or second cache structures. ### Claim 28 (depends on 27) The apparatus of claim 27, wherein the virtual-address cache module is virtually indexed such that the virtual-address cache module determines whether to indicate a hit or a miss for a particular virtual address based on an index that includes a portion of the particular virtual address and is used to look up one of multiple entries or sets of entries in the second cache structure. ### Claim 29 (depends on 19) The apparatus of claim 19, wherein the first cache structure has fewer entries than the second cache structure. ### Claim 30 (depends on 19) The apparatus of claim 19, wherein the first cache structure is configured as a fully associative cache. ### Claim 31 (depends on 30) The apparatus of claim 30, wherein the second cache structure is configured as a set associative cache with multiple cache sets and multiple cache ways. ### Claim 32 (depends on 31) The apparatus of claim 31, wherein a total number of entries in the first cache structure is at least as large as a total number of cache ways in the second cache structure. ### Claim 33 (depends on 19) The apparatus of claim 19, wherein the first cache structure is configured as a set associative cache with multiple cache sets and multiple cache ways. ### Claim 34 (depends on 33) The apparatus of claim 33, wherein the virtual-address cache module restricts each member of a particular set of multiple synonym virtual addresses to be stored in the same particular cache set of the multiple cache sets, unless that member is the only member of that particular set of multiple synonym virtual addresses that is currently stored in the first cache structure. ### Claim 35 (depends on 19) The apparatus of claim 19, wherein the virtual-address cache module is configured as a first level data cache. ### Claim 36 (depends on 35) The apparatus of claim 35, wherein the one or more cache modules include one or more cache modules between the virtual-address cache module and the main memory, and at least some of the one or more cache modules between the first level data cache and the main memory are configured as a physical-address cache module that receives at least a portion of a physical address and in response indicates a hit if a copy of a corresponding memory block is presently stored in the physical-address cache module, and indicates a miss if a copy of the corresponding memory block not presently stored in the physical-address cache module.