# US 2017/0286290 A1 · Efficient buffering for a system having non-volatile memory

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- Number: US 2017/0286290 A1
- Document ID: US20170286290A1
- Status: Published application
- Kind: A1
- Application number: 15/630,376
- Filed: 2017-06-22
- Published: 2017-10-05
- Earliest claimed: 2011-02-28
- Assignees: Apple Inc.
- Applicants: Apple Inc.
- Inventors: Daniel J. Post; Nir Jacob Wakrat
- Web page: https://patentgrep.com/patent/US20170286290A1

## CPC

- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 3/061: {Improving I/O performance}
- G06F 3/0613: {in relation to throughput}
- G06F 3/0656: {Data buffering arrangements}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 3/068: {Hybrid storage device}
- G06F 12/1408: {by using cryptography (for digital transmission H04L9/00)}
- G06F 13/1673: {using buffers}
- G06F 21/71: to assure secure computing or processing of information
- G06F 21/79: in semiconductor storage media, e.g. directly-addressable memories
- G06F 2212/1052: Security improvement
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

Systems and methods are disclosed for efficient buffering for a system having non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can use heuristics to determine whether to perform buffering of one or more write commands received from a file system. In other embodiments, the control circuitry can minimize read energy and buffering overhead by efficiently re-ordering write commands in a queue along page-aligned boundaries of a buffer. In further embodiments, the control circuitry can optimally combine write commands from a buffer with write commands from a queue. After combining the commands, the control circuitry can dispatch the commands in a single transaction.

## Claims

### Claim 1

A method for splitting data writes into multiple write paths, the method comprising:
receiving a first write command from a file system for programming to a non-volatile memory (“NVM”);
saving the first write command in a queue;
determining the size of the first write command;
determining whether to perform buffering based at least in part on the size of the first write command; and
in response to determining to perform buffering, transferring the first write command from the queue to a buffer.

### Claim 2 (depends on 1)

The method of claim 1, wherein in response to determining not to perform buffering, dispatching the first write command from the queue to the NVM.

### Claim 3 (depends on 2)

The method of claim 2, further comprising:
determining whether the amount of time that has elapsed since a last dispatched write command is less than a pre-determined time period; and
in response to determining that the amount of time that has elapsed since a last dispatched write command is less than the pre-determined time period, waiting to receive additional write commands in the queue before dispatching the first write command from the queue to the NVM.

### Claim 4 (depends on 1)

The method of claim 1, wherein the determining whether to perform buffering further comprises:
determining if the size of the first write command is below a pre-determined threshold; and
in response to determining that the size of the first write command is below the pre-determined threshold, determining whether the number of write commands saved in the queue exceeds a pre-determined number.

### Claim 5 (depends on 4)

The method of claim 4, further comprises:
in response to determining that the number of write commands saved in the queue exceeds the pre-determined number, combining the write commands into a write-multi command; and
dispatching the write-multi command from the queue to the NVM.

### Claim 6 (depends on 1)

The method of claim 1, wherein the determining whether to perform buffering further comprises:
determining whether a set of most recently receive write commands in the queue is sequential;
in response to determining that the set of the most recently receive write commands is sequential, waiting to receive additional write commands in the queue.

### Claim 7 (depends on 6)

The method of claim 6, further comprising:
receiving at least one additional write command from the file system;
combining the at least one additional write command with the set of most recently received write commands into a write-multi command; and
dispatching the write-multi command from the queue to the NVM.

### Claim at position 8

-24. (canceled)

### Claim 25

A system comprising:
a non-volatile memory (“NVM”) comprising a plurality of pages;
a bus controller operative to communicate with the NVM;
volatile memory comprising a queue and a buffer for storing a set of write commands; and
control circuitry operative to:
receive a first write command from a file system for programming to a non-volatile memory (“NVM”);
save the first write command in the queue;
determine the size of the first write command;
determine whether to perform buffering based at least in part on the size of the first write command; and
in response to the determination to perform buffering, transferring the first write command from the queue to the buffer.

### Claim 26 (depends on 25)

The system of claim 25, wherein in response to determining not to perform buffering, the control circuitry is operative to dispatch the first write command from the queue to the NVM.

### Claim 27 (depends on 26)

The system of claim 26, wherein the control circuitry is operative to:
determine whether the amount of time that has elapsed since a last dispatched write command is less than a pre-determined time period; and
in response to determining that the amount of time that has elapsed since a last dispatched write command is less than the pre-determined time period, wait to receive additional write commands in the queue before dispatching the first write command from the queue to the NVM.

### Claim 28 (depends on 25)

The system of claim 25, wherein the control circuitry is operative to:
determine if the size of the first write command is below a pre-determined threshold; and
in response to determining that the size of the first write command is below the pre-determined threshold, determine whether the number of write commands saved in the queue exceeds a pre-determined number.

### Claim 29 (depends on 28)

The system of claim 28, wherein the control circuitry is operative:
combine the write commands into a write-multi command in response to determining that the number of write commands saved in the queue exceeds the pre-determined number; and
dispatch the write-multi command from the queue to the NVM.

### Claim 30 (depends on 25)

The system of claim 25, wherein the control circuitry is operative to:
determine whether a set of most recently receive write commands in the queue is sequential;
in response to determining that the set of the most recently receive write commands is sequential, wait to receive additional write commands in the queue.

### Claim 31 (depends on 30)

The system of claim 30, wherein the control circuitry is operative to:
receive at least one additional write command from the file system;
combine the at least one additional write command with the set of most recently received write commands into a write-multi command; and
dispatch the write-multi command from the queue to the NVM.