# US 2017/0286149 A1 · Method for Managing Memory of Virtual Machine, Physical Host, PCIE Device and Configuration Method Thereof, and Migration Management Device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2017/0286149 A1 - Document ID: US20170286149A1 - Status: Published application - Kind: A1 - Application number: 15/630,467 - Filed: 2017-06-22 - Published: 2017-10-05 - Earliest claimed: 2015-01-27 - Assignees: Huawei Technologies Co., Ltd. - Applicants: Huawei Technologies Co., Ltd. - Inventors: Shengwen Lu - Web page: https://patentgrep.com/patent/US20170286149A1 ## CPC - G06F 9/45558: {Hypervisor-specific management and integration aspects} - G06F 12/0292: {using tables or multilevel address translation means (G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10)} - G06F 12/1009: using page tables, e.g. page table structures - G06F 12/1027: using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] - G06F 13/105: {where the program performs an input/output emulation function} - G06F 13/4282: {on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247)} - G06F 2009/4557: {Distribution of virtual machine instances; Migration and load balancing} - G06F 2009/45579: {I/O management, e.g. providing access to device drivers or storage} - G06F 2009/45583: {Memory management, e.g. access or allocation} - G06F 2212/151: Emulated environment, e.g. virtual machine - G06F 2212/6042: Allocation of cache space to multiple users or processors - G06F 2212/65: Details of virtual memory and virtual address translation - G06F 2212/68: Details of translation look-aside buffer [TLB] - G06F 2213/0026: PCI express - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A method for managing a memory of a virtual machine, a physical host, a PCIE device and a configuration method thereof are provided. The method executed by a virtual machine includes: allocating a memory to a service carried on a PCIE device, where the memory includes multiple memory blocks, the multiple memory blocks is used to save working information of the service; generating a base address table BAT and a chip logic address table CLAT, where the BAT includes a CLAT entry base address corresponding to the service, and the CLAT includes a first address of each memory block; and sending an address of the BAT and a function number corresponding to the virtual machine to the PCIE device. Therefore, the PCIE device can obtain, according to the address of the BAT and the function number, working information of a service from the virtual machine. ## Claims ### Claim 1 A method, comprising: allocating, by a virtual machine, a memory to one or more services carried on a Peripheral Component Interconnect Express (PCIE) device, wherein the memory allocated to each service comprises a plurality of memory blocks, each of the plurality of memory blocks is used to save working information of a corresponding service, and each memory block is a section of memory space in which guest physical addresses are consecutive, wherein the virtual machine runs on a physical host, the physical host is connected to a PCIE device, the PCIE device is a hardware device that supports the single-root I/O virtualization (SR-IOV) standard, and the PCIE device has a physical function (PF) and a virtual function (VF), wherein a unique function number is configured for each PF and each VF separately; generating, by the virtual machine, a base address table (BAT) and a chip logic address table (CLAT) according to the memory allocated to each service, wherein the BAT comprises a CLAT entry base address corresponding to each service, and the CLAT comprises a first address of each memory block; and sending, by the virtual machine, an address of the BAT and a function number corresponding to the virtual machine to the PCIE device. ### Claim 2 (depends on 1) The method according to claim 1, wherein the one or more services comprises a to-be-processed service, and the method further comprises: receiving a request message to obtain working information of the to-be-processed service that is sent by the PCIE device, wherein the request message comprises the address of the BAT, a service type of the to-be-processed service, and a service number of the to-be-processed service; and sending, to the PCIE device according to the request message, working information in a memory block corresponding to the to-be-processed service. ### Claim 3 (depends on 2) The method according to claim 2, wherein sending the working information in the memory block corresponding to the to-be-processed service comprises: obtaining the BAT corresponding to the address of the BAT; determining, according to the service type of the to-be-processed service and the BAT, a CLAT entry base address corresponding to the service type; determining an entry offset according to the service number of the to-be-processed service; obtaining, according to the CLAT entry base address and the entry offset, a CLAT entry corresponding to the to-be-processed service; and sending, to the PCIE device, the working information in a memory block corresponding to the CLAT entry that corresponds to the to-be-processed service. ### Claim 4 (depends on 3) The method according to claim 3, wherein the CLAT is a single-level CLAT or a multi-level CLAT; wherein the multi-level CLAT comprises N levels of CLAT, wherein N≧2, and N is an integer; wherein each level of CLAT comprises multiple entries; wherein each entry in the nth level of CLAT indicates an address of the (n+1)th level of CLAT, wherein 2≦n