# US 2017/0285705 A1 · Hardware managed power collapse and clock wake-up for memory management units and distributed virtual memory networks

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- Number: US 2017/0285705 A1
- Document ID: US20170285705A1
- Status: Published application
- Kind: A1
- Application number: 15/086,054
- Filed: 2016-03-31
- Published: 2017-10-05
- Earliest claimed: 2016-03-31
- Assignees: QUALCOMM Incorporated
- Applicants: QUALCOMM Incorporated
- Inventors: Jason Edward PODAIMA; Christophe Denis Bernard AVOINNE; Manokanthan SOMASUNDARAM; Sina DENA; Paul Christopher John WIERCIENSKI; Bohuslav RYCHLIK; Steven John HALTER; Jaya Prakash SUBRAMANIAM GANASAN; Myil RAMKUMAR; Dipt Ranjan PAL
- Web page: https://patentgrep.com/patent/US20170285705A1

## CPC

- G06F 1/266: {Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips}
- G06F 1/10: Distribution of clock signals {, e.g. skew}
- G06F 1/324: by lowering clock frequency
- G06F 1/3275: {Power saving in memory, e.g. RAM, cache}
- G06F 1/3287: by switching off individual functional units in the computer system
- G06F 12/08: in hierarchically structured memory systems, e.g. virtual memory systems
- G06F 2212/1028: Power efficiency
- G06F 2212/657: Virtual address space management
- G06F 2212/683: Invalidation
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

Methods and systems are disclosed for full-hardware management of power and clock domains related to a distributed virtual memory (DVM) network. An aspect includes transmitting, from a DVM initiator to a DVM network, a DVM operation, broadcasting, by the DVM network to a plurality of DVM targets, the DVM operation, and, based on the DVM operation being broadcasted to the plurality of DVM targets by the DVM network, performing one or more hardware optimizations comprising: turning on a clock domain coupled to the DVM network or a DVM target of the plurality of DVM targets that is a target of the DVM operation, increasing a frequency of the clock domain, turning on a power domain coupled to the DVM target based on the power domain being turned off, or terminating the DVM operation to the DVM target based on the DVM target being turned off.

## Claims

### Claim 1

A method for full-hardware management of power and clock domains related to a distributed virtual memory (DVM) network, comprising:
transmitting, from a DVM initiator to a DVM network, a DVM operation;
broadcasting, by the DVM network to a plurality of DVM targets, the DVM operation; and
based on the DVM operation being broadcasted to the plurality of DVM target by the DVM network, performing one or more hardware functions comprising:
turning on a clock domain coupled to the DVM network or a DVM target of the plurality of DVM targets that is a target of the DVM operation,
increasing a frequency of the clock domain coupled to the DVM network or the DVM target of the plurality of DVM targets that is the target of the DVM operation,
turning on a power domain coupled to the DVM target of the plurality of DVM targets that is the target of the DVM operation based on the power domain being turned off,
terminating the DVM operation to the DVM target of the plurality of DVM targets that is the target of the DVM operation based on the DVM target being turned off, or
any combination thereof.

### Claim 2 (depends on 1)

The method of claim 1, wherein turning on the clock domain coupled to the DVM target of the plurality of DVM targets that is the target of the DVM operation comprises:
asserting, by the DVM initiator, a wakeup request to the clock domain coupled to the DVM target;
blocking, by the DVM network, the DVM operation while the clock domain coupled to the DVM target is turned off;
turning on the clock domain coupled to the DVM target; and
based on the clock domain coupled to the DVM target being turned on, unblocking the DVM operation and transmitting, by the DVM network, the DVM operation to the DVM target of the plurality of DVM targets that is the target of the DVM operation.

### Claim 3 (depends on 1)

The method of claim 1, wherein increasing the frequency of the clock domain coupled to the DVM target of the plurality of DVM targets that is the target of the DVM operation comprises:
asserting, by the DVM initiator, a wakeup request to the clock domain coupled to the DVM target;
selecting, by a clock selector unit coupled to the DVM initiator, a non-divided version of the clock domain coupled to the DVM target; and
based on the non-divided version of the clock domain coupled to the DVM target being selected, transmitting, by the DVM network, the DVM operation to the DVM target that is the target of the DVM operation.

### Claim 4 (depends on 1)

The method of claim 1, wherein turning on the power domain coupled to the DVM target of the plurality of DVM targets that is the target of the DVM operation comprises:
issuing, by a power collapse manager coupled to the DVM network, a power on request to the power domain coupled to the DVM target that is the target of the DVM operation;
issuing, by the power collapse manager, a power on request to the DVM target that is the target of the DVM operation;
unblocking, by the DVM target that is the target of the DVM operation, DVM operations from the DVM network based on the power on request received from the power collapse manager;
reconnecting, by the DVM target that is the target of the DVM operation, to the DVM network; and
transmitting, by the DVM network, the DVM operation to the DVM target that is the target of the DVM operation.

### Claim 5 (depends on 4)

The method of claim 4, wherein issuing the power on request to the DVM target that is the target of the DVM operation is based on receiving, by the power collapse manager, a response from the power domain coupled to the DVM target indicating that the power domain coupled to the DVM target is turned on.

### Claim 6 (depends on 4)

The method of claim 4, further comprising:
receiving a request to power on the DVM target that is the target of the DVM operation, wherein the request is received from software being executed by the DVM initiator; and
sending a power status signal to the software indicating that the power domain coupled to the DVM target is turned on.

### Claim 7 (depends on 1)

The method of claim 1, wherein terminating the DVM operation to the DVM target of the plurality of DVM targets that is the target of the DVM operation based on the DVM target being turned off comprises:
receiving, from a DVM disconnect module, a command to terminate subsequent DVM operations.

### Claim 8 (depends on 1)

The method of claim 1, wherein terminating the DVM operation to the DVM target of the plurality of DVM targets that is the target of the DVM operation based on the DVM target being turned off comprises:
terminating, by the DVM network, the DVM operation; and
generating, by the DVM network, a response to the DVM operation.

### Claim 9 (depends on 1)

The method of claim 1, wherein the plurality of DVM targets comprise one or more memory management units.

### Claim 10 (depends on 1)

The method of claim 1, wherein the DVM initiator comprises a processor.

### Claim 11 (depends on 1)

The method of claim 1, wherein the DVM operation comprises a translation lookaside buffer (TLB) invalidate operation, a synchronization operation, or any combination thereof.

### Claim 12 (depends on 1)

The method of claim 1, wherein the DVM initiator is coupled to a separate clock domain and a separate power domain from a clock domain and a power domain of the DVM network.

### Claim 13 (depends on 1)

The method of claim 1, wherein the plurality of DVM targets are coupled to clock domains and power domains separate from a clock domain and a power domain of the DVM initiator and a clock domain and a power domain of the DVM network.

### Claim 14 (depends on 1)

The method of claim 1, wherein each of the plurality of DVM targets is coupled to a separate clock domain and a separate power domain from remaining ones of the plurality of DVM targets.

### Claim 15 (depends on 1)

The method of claim 1, wherein the plurality of DVM targets is coupled to a single clock domain and a power domain.

### Claim 16

An apparatus for full-hardware management of power and clock domains related to a distributed virtual memory (DVM) network, comprising:
a DVM initiator;
a plurality of DVM targets;
a DVM network coupled to the DVM initiator and the plurality of DVM targets, wherein the DVM network is configured to broadcast DVM operations from the DVM initiator to the plurality of DVM targets,
wherein, based on a DVM operation in the DVM network being broadcasted to the plurality of DVM targets:
a clock domain coupled to the DVM network or a DVM target of the plurality of DVM targets that is a target of the DVM operation is turned on,
a frequency of the clock domain coupled to the DVM network or the DVM target of the plurality of DVM targets that is the target of the DVM operation is increased,
a power domain coupled to the DVM target of the plurality of DVM targets that is the target of the DVM operation is turned on based on the power domain being turned off,
the DVM operation to the DVM target of the plurality of DVM targets that is the target of the DVM operation is terminated based on the DVM target being turned off, or
any combination thereof.

### Claim 17 (depends on 16)

The apparatus of claim 16, wherein the plurality of DVM targets comprise one or more memory management units.

### Claim 18 (depends on 17)

The apparatus of claim 17, wherein the one or more memory management units each comprise a translation lookaside buffer (TLB).

### Claim 19 (depends on 16)

The apparatus of claim 16, wherein the DVM initiator comprises a processor.

### Claim 20 (depends on 16)

The apparatus of claim 16, wherein the DVM operations comprise a TLB invalidate operations, synchronization operations, or any combination thereof.

### Claim 21 (depends on 16)

The apparatus of claim 16, wherein the DVM initiator is coupled to a separate clock domain and a separate power domain from a clock domain and a power domain of the DVM network.

### Claim 22 (depends on 16)

The apparatus of claim 16, wherein the plurality of DVM targets are coupled to clock domains and power domains separate from a clock domain and a power domain of the DVM initiator and a clock domain and a power domain of the DVM network.

### Claim 23 (depends on 16)

The apparatus of claim 16, wherein each of the plurality of DVM targets is coupled to a separate clock domain and a separate power domain from remaining ones of the plurality of DVM targets.

### Claim 24 (depends on 16)

The apparatus of claim 16, wherein the plurality of DVM targets is coupled to a single clock domain and a power domain.

### Claim 25 (depends on 16)

The apparatus of claim 16, wherein the DVM network merges responses from the plurality of DVM targets into a merged response and reports the merged response to the DVM initiator.

### Claim 26 (depends on 16)

The apparatus of claim 16, wherein based on the DVM operation to the DVM target of the plurality of DVM targets that is the target of the DVM operation being terminated, the DVM network responds to the DVM initiator on behalf of the DVM target.

### Claim 27

An apparatus for full-hardware management of power and clock domains related to a distributed virtual memory (DVM) network, comprising:
means for transmitting, to a DVM network, a DVM operation;
means for broadcasting, to a plurality of DVM targets, the DVM operation; and
means for performing, based on the DVM operation being broadcasted to the plurality of DVM targets by the DVM network, one or more hardware functions comprising:
turn on a clock domain coupled to the DVM network or a DVM target of the plurality of DVM targets that is a target of the DVM operation,
increase a frequency of the clock domain coupled to the DVM network or the DVM target of the plurality of DVM targets that is the target of the DVM operation,
turn on a power domain coupled to the DVM target of the plurality of DVM targets that is the target of the DVM operation based on the power domain being turned off,
terminate the DVM operation to the DVM target of the plurality of DVM targets that is the target of the DVM operation based on the DVM target being turned off, or
any combination thereof.

### Claim 28 (depends on 27)

The apparatus of claim 27, wherein the plurality of DVM targets comprise one or more memory management units.

### Claim 29 (depends on 27)

The apparatus of claim 27, wherein the DVM initiator is coupled to a separate clock domain and a separate power domain from a clock domain and a power domain of the DVM network.

### Claim 30 (depends on 27)

The apparatus of claim 27, wherein the plurality of DVM targets are coupled to clock domains and power domains separate from a clock domain and a power domain of the DVM initiator and a clock domain and a power domain of the DVM network.