# US 2017/0285673 A1 · Semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2017/0285673 A1 - Document ID: US20170285673A1 - Status: Published application - Kind: A1 - Application number: 15/472,196 - Filed: 2017-03-28 - Published: 2017-10-05 - Earliest claimed: 2016-03-29 - Assignees: Renesas Electronics Corporation - Applicants: Renesas Electronics Corporation - Inventors: Terunori KUBO; Tatsuya ISHIKAWA - Web page: https://patentgrep.com/patent/US20170285673A1 ## CPC - G05F 1/56: using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) - H03K 17/687: the devices being field-effect transistors - H03K 19/017509: {Interface arrangements} - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract In a semiconductor device of related art, the degree of freedom when using one pad with plural functions has been disadvantageously low. A semiconductor device has an internal logic circuit, a regulator circuit, and an interface circuit, and the regulator circuit and the interface circuit are coupled to one shared pad. In the case where a driving transistor of the regulator circuit is controlled to be in a conductive state, the shared pad is used as a terminal to which an input voltage of the regulator circuit is input. In the case where the driving transistor of the regulator circuit is controlled to be in a disconnected state, the shared pad is used as an input/output terminal of the interface circuit. ## Claims ### Claim 1 A semiconductor device comprising: a shared pad to which a plurality of circuits is coupled; a regulator circuit that includes a driving transistor coupled between the shared pad and an internal logic circuit and a driving control circuit that drives the driving transistor on the basis of the voltage of a wire coupling the driving transistor and the internal logic circuit to each other; and an interface circuit coupled to the shared pad, wherein the driving control circuit has, at least, two operation modes among a first operation mode in which an internal power supply generated by lowering a power supply applied to the shared pad using the regulator circuit is supplied to the internal logic circuit, a second operation mode in which the interface circuit uses the shared pad to transmit and receive signals, and a third operation mode in which the shared pad and the internal logic circuit are coupled to each other as a wire, wherein a control signal that keeps the voltage of the internal power supply constant is applied to the driving transistor in the first operation mode, wherein a control signal of a first logic level is applied to the driving transistor to turn the driving transistor to a disconnected state in the second operation mode, and wherein a control signal of a second logic level that is a logic level opposite to the first logic level is applied to the driving transistor in the third operation mode. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein provided is a non-volatile storing unit that stores an operation mode setting value by which one of the operation modes to operate the regulator circuit is determined and can rewrite the stored operation mode setting value, and the driving control circuit determines the operation mode by reading the operation mode setting value when being activated. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein as the driving transistors, the regulator circuit has: a first transistor and a second transistor that are controlled by a first control signal and are coupled in series between the shared pad and the internal logic circuit; and a third transistor that is coupled between a wire coupling the first transistor and the second transistor to each other and a ground wire, and is controlled by a second control signal of a voltage level different from that of the first control signal, wherein the driving control circuit sets the first control signal at a voltage level at which the voltage of the internal power supply is kept constant and sets the second control signal to the ground voltage in the first operation mode, wherein the driving control circuit sets the first control signal at the first logic level and sets the second control signal at the second logic level in the second operation mode, and wherein the driving control circuit sets the first control signal at the second logic level and sets the second control signal at the first logic level in the third operation mode. ### Claim 4 (depends on 3) The semiconductor device according to claim 3, wherein the driving control circuit sets to the first logic level the voltage level of one of the first control signal and the second control signal set at the second logic level, and then switches the voltage level of the control signal set at the first logic level to the second logic level after a predetermined delay time. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein one of an external power supply having a voltage corresponding to the voltage of the internal power supply, a ground power supply having a ground voltage, and a bypass capacitor is coupled to the shared pad in the third operation mode. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein the driving transistor is formed using an N-type semiconductor. ### Claim 7 A semiconductor device comprising: a shared pad to which a plurality of circuits is coupled; a regulator circuit that includes a first conductive-type driving transistor coupled between the shared pad and an internal logic circuit and a driving control circuit that drives the driving transistor on the basis of the voltage of a wire coupling the driving transistor and the internal logic circuit to each other; and an interface circuit coupled to the shared pad, wherein the driving control circuit has a first operation mode in which an internal power supply generated by lowering a power supply applied to the shared pad using the regulator circuit is supplied to the internal logic circuit, and a second operation mode in which the interface circuit uses the shared pad to transmit and receive signals, wherein a control signal that keeps the voltage of the internal power supply constant is applied to the driving transistor in the first operation mode, and wherein a control signal of a first logic level to turn the driving transistor to a disconnected state is applied in the second operation mode.