# US 2017/0285486 A1 · Mqw devices & methods for semiconductor patterning systems

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- Number: US 2017/0285486 A1
- Document ID: US20170285486A1
- Status: Published application
- Kind: A1
- Application number: 15/628,611
- Filed: 2017-06-20
- Published: 2017-10-05
- Earliest claimed: 2014-12-08
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Yibing M. WANG; Duhyun LEE
- Web page: https://patentgrep.com/patent/US20170285486A1

## CPC

- G03F 7/70291: {Addressable masks, e.g. spatial light modulators [SLMs], digital micro-mirror devices [DMDs] or liquid crystal display [LCD] patterning devices}
- G02F 1/0121: {Operation of devices; Circuit arrangements, not otherwise provided for in this subclass}
- G02F 1/017: Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
- G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G)
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS

## Abstract

MQW devices, IC chips and methods may be used in semiconductor lithography patterning systems. An MQW device includes an array of pixels that have transmission elements and associated support circuits. The support circuits have preliminary memory cells and final memory cells. The final memory cells store transmittance values that control transmittances of the associated transmission elements. This way, exposure of a target with a lithography system for purposes of patterning the target may be performed through the transmission elements according to the controlled transmittances, while subsequent transmittance values are being received by the preliminary memory cells from memory banks. The exposure of the target therefore needs to pause for less time, in order to wait for the MQW device to be refreshed with the subsequent transmittance values. Accordingly the whole semiconductor lithography patterning system may operate faster and thus have more throughput.

## Claims

### Claim 1

A method to pattern a target using a multiple-quantum-well (MQW) device configured for use in a semiconductor patterning system, the method comprising:
receiving at a first preliminary memory cell of a first pixel a first transmittance value from a memory bank of the semiconductor patterning system via a data line, the first pixel including a first transmission element and a first support circuit, the first support circuit including the first preliminary memory cell, a first load switch, and a first final memory cell;
receiving the first transmittance value at the first final memory cell from the first preliminary memory cell via the first load switch;
storing the first transmittance value in the first final memory cell;
receiving at a second preliminary memory cell of a second pixel a second transmittance value from the memory bank of the semiconductor patterning system via the data line, the second pixel including a second transmission element and a second support circuit, the second support circuit including the second preliminary memory cell, a second load switch, and a second final memory cell;
receiving the second transmittance value at the second final memory cell from the second preliminary memory cell via the second load switch;
storing the second transmittance value in the second final memory cell; and
passing a beam of energy through the first and second transmission elements, a first beamlet of energy emerging from the first transmission element towards the target being based on the first stored transmittance value and a second beamlet of energy emerging from the second transmission element towards the target being based on the stored second transmission value.

### Claim 2 (depends on 1)

The method of claim 1, wherein the first support circuit further includes a first preliminary switch,
wherein receiving the first transmittance value further comprises receiving the first transmittance value at the preliminary memory cell through the first preliminary switch.

### Claim 3 (depends on 2)

The method of claim 2, wherein receiving the first transmittance value further comprises receiving the first transmittance value in response to a column signal coupled to the MQW device.

### Claim 4 (depends on 1)

The method of claim 1, wherein the first preliminary memory cell comprises two inverters.

### Claim 5 (depends on 1)

The method of claim 1, wherein the first preliminary memory cell is configured to store a negative version of the first transmittance value,
wherein receiving the first transmittance value further comprises storing the negative version of the first transmittance value in the first preliminary memory cell.

### Claim 6 (depends on 1)

The method of claim 1, wherein receiving the first transmittance value at the first final memory cell comprises receiving the first transmittance value at the first final memory cell in response to a load signal.

### Claim 7 (depends on 1)

The method of claim 1, wherein the first final memory cell comprises two inverters.

### Claim 8 (depends on 1)

The method of claim 1, wherein the first final memory cell is configured to store a negative version of the first transmittance value,
wherein storing the first transmittance value in the first final memory cell further comprises storing the negative version of the first transmittance value in the first final memory cell.

### Claim 9 (depends on 8)

The method of claim 8, wherein the first final memory cell comprises two inverters.

### Claim 10 (depends on 1)

The method of claim 1, wherein receiving the first transmittance value at the first final memory cell comprises receiving the first transmittance value at the first final memory cell in response to a load signal, and
wherein receiving the second transmittance value at the second final memory cell comprises receiving the second transmittance value at the second final memory cell in response to the load signal.

### Claim 11

A method for a MQW device that is configured for use in a semiconductor patterning system that is intended to pattern a target, the MQW device including a first pixel that has a first transmission element and a first support circuit and a second pixel that has a second transmission element and a second support circuit the first support circuit having a first preliminary memory cell, a first load switch, and a first final memory cell, the semiconductor patterning system including a memory bank configured to store a first and a second transmittance values, a data line coupled to the memory bank, and a source configured to transmit a beam of energy towards the MQW device, the method comprising:
receiving, in the first support circuit, the first transmittance value via the data line;
storing the received first transmittance value in the first preliminary memory cell;
receiving, in the first final memory cell, the first transmittance value from the first preliminary memory cell through the first load switch;
storing, in the first final memory cell, the first transmittance value received through the first load switch, a transmittance of the first transmission element depending on the first transmittance value stored in the first final memory cell;
receiving, in the second support circuit, the second transmittance value via the data line; and
storing, in the second support circuit, the received second transmittance value, a transmittance of the second transmission element depending on the second transmittance value stored in the second support circuit,
in which the first and the second transmission elements permit to emerge, according to their transmittances, beamlets of the transmitted beam that reaches the MQW device, and
the beamlets emerging from the MQW device reach and pattern the target.

### Claim 12 (depends on 11)

The method of claim 11, further comprising:
then receiving, in the first preliminary memory cell, via the data line a subsequent transmittance value; and
storing, in the first preliminary memory cell, the received subsequent transmittance value concurrently with the first final memory cell storing the first transmittance value.

### Claim 13 (depends on 12)

The method of claim 12, further comprising:
then receiving and storing the subsequent transmittance value in the first final memory cell.

### Claim 14 (depends on 11)

The method of claim 11, in which
the first support circuit also has a first preliminary switch, and
the first transmittance value is received via the data line by the first preliminary memory cell through the first preliminary switch.

### Claim 15 (depends on 14)

The method of claim 14, in which
the first transmittance value is received through the first preliminary switch responsive to a column signal.

### Claim 16 (depends on 11)

The method of claim 11, in which
the first preliminary memory cell stores a negative version of the first transmittance value.

### Claim 17 (depends on 11)

The method of claim 11, in which
the first transmittance value is configured to be received through the first load switch responsive to a load signal.

### Claim 18 (depends on 11)

The method of claim 11, in which
the first final memory cell stores a negative version of the first transmittance value.

### Claim 19 (depends on 11)

The method of claim 11, in which
the second support circuit has a second preliminary memory cell that stores the received second transmittance value, a second load switch, and a second final memory cell,
the second transmittance value is received in by the second final memory cell from the second preliminary memory cell through the second load switch responsive to the load signal,
the received second transmittance value is stored in the second final memory cell.

### Claim 20 (depends on 19)

The method of claim 19, in which
the first final memory cell receives the first transmittance value responsive to a load signal, and
the second final memory cell receives the second transmittance value responsive to the load signal.