# US 2017/0256501 A1 · Methods of forming semiconductor devices including determining misregistration between semiconductor levels and related apparatuses

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- Number: US 2017/0256501 A1
- Document ID: US20170256501A1
- Status: Published application
- Kind: A1
- Application number: 15/062,452
- Filed: 2016-03-07
- Published: 2017-09-07
- Earliest claimed: 2016-03-07
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Yang Chao; Joseph L. Hess; Keith E. Ypma; Kurt J. Bossart
- Web page: https://patentgrep.com/patent/US20170256501A1

## CPC

- H10W 46/00: Marks applied to devices, e.g. for alignment or identification
- G03F 7/70633: {Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching}
- G06T 7/001: {using an image reference approach}
- G06T 7/11: Region-based segmentation
- G06T 7/73: using feature-based methods
- G06T 11/20: Drawing from basic elements
- H10P 72/0606: {Position monitoring, e.g. misposition detection or presence detection}
- H10P 72/53: {using optical controlling means}
- H10P 74/203: {Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects}
- H10P 74/23: {characterised by multiple measurements, corrections, marking or sorting processes}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 90/00: Package configurations
- G06T 2207/30148: Semiconductor; IC; Wafer
- G06T 2207/30204: Marker
- H10W 46/101: {characterised by the type of information, e.g. logos or symbols}
- H10W 46/301: {for alignment}
- H10W 46/501: {for use before dicing}
- H10W 46/503: {Located in scribe lines}
- H10W 72/823: {Interconnections through encapsulations, e.g. pillars through molded resin on a lateral side a chip}
- H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G)
- G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method of determining a lateral misregistration between levels of a semiconductor structure comprises imaging at least one first alignment mark in a first level of the structure and at least one second alignment mark in a second level of the structure. A digital image of the first and second alignment marks is formed, each of which are defined by a set of points having an x-value and a y-value. The x-values and y-values of points defining the first alignment mark and points defining the second alignment mark are averaged to determine a center of the first alignment mark and a center of the second alignment mark. An x-coordinate and a y-coordinate of the center of the first alignment mark is subtracted from the respective x-coordinate and y-coordinate of the center of the second alignment mark to determine a lateral misregistration between the first level and the second level. Related methods of forming a semiconductor wafer, semiconductor assembles and metrology tools for use in implementing the methods are disclosed.

## Claims

### Claim 1

A method of forming a semiconductor structure, the method comprising:
forming at least one first circular alignment mark at a known distance and orientation relative to electrically conductive elements on a first level of a structure;
forming at least one second circular alignment mark on a second level of the structure at a location corresponding to a same distance and orientation relative to the electrically conductive elements as the first circular alignment mark;
forming a digital image of the at least one first circular alignment mark on the first level of the structure and the at least one second circular alignment mark on the second level of the structure, wherein the at least one first circular mark is defined by a first set of points, each point of the first set of points comprising an x-coordinate and a y-coordinate and the at least one second circular alignment mark is defined by a second set of points, each point of the second set of points comprising an x-coordinate and a y-coordinate;
determining an x-coordinate and a y-coordinate of a center of the at least one first circular alignment mark by respectively averaging the x-coordinates of the first set of points and averaging the y-coordinates of the first set of points;
determining an x-coordinate and a y-coordinate of a center of the at least one second circular alignment mark by respectively averaging the x-coordinates of the second set of points and averaging the y-coordinates of the second set of points;
subtracting the x-coordinate and the y-coordinate of the center of the at least one first circular alignment mark from the respective x-coordinate and y-coordinate of the center of the at least one second circular alignment mark to determine a lateral misregistration between the first level and the second level; and
responsive to determining the lateral misregistration, adjusting a location of the first level with respect to the second level by the determined lateral misregistration to position lateral edges of the first level to be substantially parallel with lateral edges of the second level.

### Claim 2 (depends on 1)

The method of claim 1, further comprising forming the at least one second circular alignment mark to have a smaller diameter than a diameter of the at least one first circular alignment mark.

### Claim 3 (depends on 2)

The method of claim 2, further comprising forming the at least one second circular alignment mark to be substantially disposed within edges of the at least one first circular alignment mark.

### Claim 4 (depends on 1)

The method of claim 1, further comprising:
forming the at least one first circular alignment mark to comprise a diameter between about 10 μm and about 30 μm; and
forming the at least one second circular alignment mark to comprise a diameter between about 5 μm and about 20 μm.

### Claim 5 (depends on 1)

The method of claim 1, further comprising forming at least one of the at least one first circular alignment mark or the at least one second circular alignment mark over a through substrate via.

### Claim 6 (depends on 1)

The method of claim 1, wherein subtracting the x-coordinate and the y-coordinate of the center of the at least one first circular alignment mark from the respective x-coordinate and y-coordinate of the center of the at least one second circular alignment mark to determine a lateral misregistration comprises:
subtracting the x-coordinate of the center of the at least one first alignment mark from the x-coordinate of the center of the at least one second alignment mark to determine a lateral misregistration in an x-direction; and
subtracting the y-coordinate of the center of the at least one first alignment mark from the y-coordinate of the center of the at least one second alignment mark to determine a lateral misregistration in a y-direction.

### Claim 7 (depends on 6)

The method of claim 6, wherein the structure comprises a semiconductor wafer and adjusting a location of the first level with respect to the second level by the determined lateral misregistration comprises:
moving a wafer stage supporting the semiconductor wafer laterally in the x-direction by a magnitude corresponding to the misregistration in the x-direction; and
moving the wafer stage laterally in the y-direction by a magnitude corresponding to the misregistration in the y-direction.

### Claim 8 (depends on 1)

The method of claim 1, wherein forming a digital image of at least one first circular alignment mark comprises defining the at least one first circular alignment mark with at least 3 points.

### Claim 9 (depends on 1)

The method of claim 1, further comprising selecting each point of the first set of points to be separated from an adjacent point of the first set of points by about a same distance.

### Claim 10

A method of forming a semiconductor structure, the method comprising:
imaging at least one first alignment mark in a first level of a semiconductor structure and at least one second alignment mark in a second level of the semiconductor structure;
forming a digital image of the at least one first alignment mark and the at least one second alignment mark, wherein the at least one first alignment mark is defined by a first set of points, each point of the first set of points defined by an x-value and a y-value and the at least one second alignment mark is defined by a second set of points, each point of the second set of points defined by an x-value and a y-value;
averaging the x-values and the y-values of the first set of points to determine a respective x-value and a y-value of a center of the at least one first alignment mark;
averaging the x-values and the y-values of the second set of points to determine a respective x-value and a y-value of a center of the at least one second alignment mark;
subtracting the x-value and the y-value of the center of the at least one first alignment mark from the respective x-value and y-value of the center of the at least one second alignment mark to determine a magnitude and direction of misregistration between the first level and the second level of the semiconductor wafer; and
moving a stage of a photolithography tool by an amount corresponding to the misregistration during formation of one or more electrically conductive elements of the semiconductor structure.

### Claim 11 (depends on 10)

The method of claim 10, further comprising defining the at least one first alignment mark with a first set of points comprising at least a plurality of points.

### Claim 12 (depends on 10)

The method of claim 10, wherein averaging the x-values and the y-values of the first set of points comprises averaging the x-values and the y-values of a plurality of points that define a circle, each of the points separated from a circumferentially adjacent point by about a same distance.

### Claim 13 (depends on 10)

The method of claim 10, further comprising selecting the at least one first alignment mark and the at least one second alignment mark to each comprise a circle.

### Claim 14 (depends on 10)

The method of claim 10, further comprising selecting the at least one first alignment mark to comprise a circle and the at least one second alignment mark to comprise a square.

### Claim 15 (depends on 14)

The method of claim 14, further comprising selecting the at least one first alignment mark to be disposed within the at least one second alignment mark.

### Claim 16 (depends on 14)

The method of claim 14, further comprising selecting the at least one second alignment mark to be disposed within the at least one first alignment mark.

### Claim 17 (depends on 14)

The method of claim 14, wherein forming a digital image of the at least one first alignment mark and the at least one second alignment mark comprises forming a digital image of at least one square, sides of the at least one square defined by a same number of points as other sides of the at least one square.

### Claim 18

An apparatus, comprising:
a stage configured to carry a semiconductor wafer, the wafer comprising at least one first alignment mark located a known distance and orientation relative to electrically conductive elements on a first level of the wafer and at least one second alignment mark on a second level thereof and located at a location corresponding to a same distance and orientation relative to the electrically conductive elements as the at least one first alignment mark;
a camera configured to provide a digital image of the semiconductor wafer defining the at least one first alignment mark with a first set of points, each point of the first set of points defined by an x-value and a y-value and defining the at least one second alignment mark with a second set of points, each point of the second set of points defined by an x-value and a y-value; and
a computing system operably coupled to the camera, the computing system configured to:
calculate an average of the x-values and the y-values of the first set of points to determine a respective x-value and a y-value of a center of the at least one first alignment mark;
calculate an average of the x-values and the y-values of the second set of points to determine a respective x-value and a y-value of a center of the at least one second alignment mark; and
subtract the x-value and the y-value of the center of the at least one first alignment mark from the respective x-value and y-value of the center of the at least one second alignment mark to determine a magnitude and direction of misregistration between the first level and the second level of the semiconductor wafer;
wherein the stage is configured to move at least one of the first level and the second level with respect to the other of the first level and the second level to position lateral edges of the first level to be substantially parallel to lateral edges of the second level.

### Claim 19 (depends on 18)

The apparatus of claim 18, wherein the computing system is further configured to transmit values corresponding to the determined misregistration to a wafer stage of a lithography tool before remaining wafers in a lot of wafers are processed.

### Claim 20 (depends on 18)

The apparatus of claim 18, wherein the computing system is configured to determine the misregistration when the at least one first alignment mark comprises a shape and the at least one second alignment mark comprises a different shape.

### Claim 21

An apparatus, comprising:
a stage configured to carry a semiconductor structure comprising at least one alignment mark having a circular shape;
a camera configured to provide a digital image of the semiconductor structure defining the at least one alignment mark with a set of points, each point of the set of points defined by an x-value and a y-value;
a computing system operably coupled to the camera, the computing system configured to:
calculate an average of the x-values and the y-values of the set of points defining at least one alignment mark on a first semiconductor structure to determine a respective x-value and a y-value of a center of the at least one alignment mark thereon;
calculate an average of the x-values and y-values of a set of points defining at least one alignment mark on a second semiconductor structure to determine a respective x-value and a y-value of a center of the at least one alignment mark thereon;
subtract the x-value and the y-value of the center of the at least one alignment mark on one of the first and second semiconductor structures from the respective x-value and y-value of the center of the at least one alignment mark on the other of the first and second semiconductor structures to determine a magnitude and direction of misregistration between the first semiconductor structure and the second semiconductor structure; and
communicate with a photolithography tool to move a stage of the photolithography tool by an amount corresponding to the misregistration during formation of one or more electrically conductive elements of the semiconductor structure.

### Claim 22 (depends on 21)

The apparatus of claim 21, wherein the computing system is further configured to transmit values corresponding to the determined misregistration to a pick-and-place tool.

### Claim 23 (depends on 18)

The apparatus of claim 18, wherein the computing system is configured to determine the misregistration when the at least one first alignment mark comprises a shape and the at least one second alignment mark comprises a different shape.

### Claim 24 (depends on 1)

The method of claim 1, wherein:
forming at least one second circular alignment mark on a second level of the structure at a location corresponding to a same distance and orientation relative to the electrically conductive elements as the first circular alignment mark comprises forming the at least one second circular alignment mark on a photoresist material; and
adjusting a location of the first level with respect to the second level by the determined lateral misregistration comprises moving the structure by the determined lateral misregistration prior to exposing the photoresist material.

### Claim 25 (depends on 1)

The method of claim 1, wherein forming at least one first circular alignment mark at a known distance and orientation relative to electrically conductive elements on a first level of a structure comprises forming the at least one first circular alignment mark on active regions of the structure.