# US 2017/0256484 A1 · Middle-end-of-line strap for standard cell

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- Number: US 2017/0256484 A1
- Document ID: US20170256484A1
- Status: Published application
- Kind: A1
- Application number: 15/058,077
- Filed: 2016-03-01
- Published: 2017-09-07
- Earliest claimed: 2016-03-01
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Meng-Hung SHEN; Chih-Liang CHEN; Charles Chew-Yuen YOUNG; Jiann-Tyng TZENG; Kam-Tou SIO; Wei-Cheng LIN
- Web page: https://patentgrep.com/patent/US20170256484A1

## CPC

- H10W 20/43: Layouts of interconnections
- H10D 1/00: Resistors, capacitors or inductors
- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 64/512: {Disposition of the gate electrodes, e.g. buried gates}
- H10D 84/834: {comprising FinFETs}
- H10D 84/853: {comprising FinFETs}
- H10W 10/011: {of isolation regions comprising dielectric materials}
- H10W 10/10: Isolation regions comprising dielectric materials
- H10W 20/056: {by filling conductive material into holes, grooves or trenches}
- H10W 20/0698: {Local interconnections}
- H10W 20/42: Vias, e.g. via plugs
- H10D 30/62: Fin field-effect transistors [FinFET]
- H10D 89/10: Integrated device layouts
- H10W 20/435: {Cross-sectional shapes or dispositions of interconnections}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor structure is disclosed that includes a semiconductor structure includes an active area, a first conductive line, a conductive via, a first conductive metal segment coupled to the conductive line through the conductive via, a second conductive metal segment disposed over the active area, and a local conductive segment configured to couple the first conductive metal segment and the second conductive metal segment.

## Claims

### Claim 1

A semiconductor structure, comprising:
a first active area;
a first conductive line;
a first conductive via;
a second conductive via;
a first conductive metal segment electrically coupled to the first conductive line through the first conductive via;
a second conductive metal segment disposed over the first active area and electrically coupled to the first conductive line through the second conductive via; and
a first conductive segment configured to electrically couple the first conductive metal segment and the second conductive metal segment,
wherein the first conductive line and the first conductive segment are disposed at two sides of the first conductive via respectively.

### Claim 2 (depends on 1)

The semiconductor structure of claim 1, further comprising:
a gate disposed over the first active area and disposed under the first conductive segment.

### Claim 3 (depends on 2)

The semiconductor structure of claim 2, wherein the gate is disposed between the first conductive metal segment and the second conductive metal segment.

### Claim 4 (depends on 2)

The semiconductor structure of claim 2, wherein a height of the first conductive segment plus a height of the gate is substantially equal to a height of the second conductive metal segment.

### Claim 5 (depends on 1)

The semiconductor structure of claim 1, wherein a height of the first conductive metal segment is greater than a height of the second conductive metal segment.

### Claim 6 (depends on 1)

The semiconductor structure of claim 1, wherein a current path is formed from the first conductive line through the second conductive via to the second conductive metal segment, and another current path is formed from the first conductive line through the first conductive via, the first conductive metal segment and the first conductive segment to the second conductive metal segment.

### Claim 7 (depends on 1)

The semiconductor structure of claim 1, further comprising:
a second active area;
a second conductive line;
a third conductive via;
a fourth conductive via;
a third conductive metal segment electrically coupled to the second conductive line through the third conductive via;
a fourth conductive metal segment disposed over the second active area and electrically coupled to the second conductive line through the fourth conductive via; and
a second conductive segment configured to electrically couple the third conductive metal segment and the fourth conductive metal segment.

### Claim 8

A semiconductor structure, comprising:
an active area;
a first conductive line;
a conductive via;
a first conductive metal segment electrically coupled to the first conductive line through the conductive via;
a second conductive metal segment disposed over the active area; and
a conductive segment configured to electrically couple the first conductive metal segment and the second conductive metal segment,
wherein the first conductive line and the conductive segment are disposed at two sides of the conductive via respectively.

### Claim 9 (depends on 8)

The semiconductor structure of claim 8, further comprising:
a gate disposed over the active area and disposed under the conductive segment.

### Claim 10 (depends on 9)

The semiconductor structure of claim 9, wherein the gate is disposed between the first conductive metal segment and the second conductive metal segment.

### Claim 11 (depends on 8)

The semiconductor structure of claim 8, wherein a height of the first conductive metal segment is greater than a height of the second conductive metal segment.

### Claim 12 (depends on 8)

The semiconductor structure of claim 8, wherein a length of the second conductive metal segment is shorter than a length of the first conductive metal segment.

### Claim 13 (depends on 8)

The semiconductor structure of claim 8, wherein a current path is formed from the first conductive line through the conductive via, the first conductive metal segment and the conductive segment, to the second conductive metal segment.

### Claim 14 (depends on 8)

The semiconductor structure of claim 8, wherein one end of the conductive via is in contact with the first conductive line, and another end of the conductive via is in contact with a portion of the first conductive metal segment and one end of the conductive segment.

### Claim 15 (depends on 14)

The semiconductor structure of claim 14, further comprising:
an isolation segment disposed over the second conductive metal segment for isolating the first conductive line from a second conductive line.

### Claim at position 16

16-20. (canceled)

### Claim 21

A semiconductor structure, comprising:
a first active area;
a first conductive line;
a first conductive via;
a second conductive via;
a first conductive metal segment electrically coupled to the first conductive line through the first conductive via;
a second conductive metal segment disposed over the first active area and electrically coupled to the first conductive line through the second conductive via;
a first conductive segment configured to electrically couple the first conductive metal segment and the second conductive metal segment; and
a gate disposed over the first active area and disposed under the first conductive segment,
wherein a height of the first conductive metal segment is greater than a height of the second conductive metal segment,
wherein the first conductive line and the first conductive segment are disposed at two sides of the first conductive via respectively.

### Claim 22 (depends on 21)

The semiconductor structure of claim 21, wherein the gate is disposed between the first conductive metal segment and the second conductive metal segment.

### Claim 23 (depends on 21)

The semiconductor structure of claim 21, wherein a height of the first conductive segment plus a height of the gate is substantially equal to a height of the second conductive metal segment.

### Claim 24 (depends on 21)

The semiconductor structure of claim 21, wherein a current path is formed from the first conductive line through the second conductive via to the second conductive metal segment, and another current path is formed from the first conductive line through the first conductive via, the first conductive metal segment, and the first conductive segment to the second conductive metal segment.

### Claim 25 (depends on 21)

The semiconductor structure of claim 21, further comprising:
a second active area;
a second conductive line;
a third conductive via;
a fourth conductive via;
a third conductive metal segment electrically coupled to the second conductive line through the third conductive via;
a fourth conductive metal segment disposed over the second active area and electrically coupled to the second conductive line through the fourth conductive via; and
a second conductive segment configured to electrically couple the third conductive metal segment and the fourth conductive metal segment.
