# US 2017/0256196 A1 · Gate driving circuit, an array substrate and a method for recovering the same

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- Number: US 2017/0256196 A1
- Document ID: US20170256196A1
- Status: Published application
- Kind: A1
- Application number: 15/246,840
- Filed: 2016-08-25
- Published: 2017-09-07
- Earliest claimed: 2016-03-04
- Assignees: Boe Technology Group Co., Ltd.; Hefei Xinsheng Optoelectronics Technology Co., Ltd.
- Applicants: BOE Technology Group Co., Ltd.; Hefei Xinsheng Optoelectronics Technology Co., Ltd.
- Inventors: Tong Yang; Tingting Zhao
- Web page: https://patentgrep.com/patent/US20170256196A1

## CPC

- G09G 3/2092: {Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto (suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165)}
- G09G 2310/0267: Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
- G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit
- G09G 2330/08: Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

The disclosure provides a gate driving circuit, an array substrate and a method for recovering the same. The gate driving circuit comprises: a plurality of cascaded shift registers; a recovering signal line and a first reference signal line, extending along an arrangement direction of the shift registers; and a plurality of recovering units, corresponding to the shift registers respectively. After determining a failed shift register in the gate driving circuit, the recovering unit replaces a signal outputted from the failed shift register with a first reference signal from the first reference signal line and loads the first reference signal to the corresponding gate line for recovering. Thus, compared with a structure of outputting the signal provided by the recovering signal line to the gate line, the gate driving circuit of the disclosure has a less significant attenuation on the signal outputted to the gate line.

## Claims

### Claim 1

A gate driving circuit, comprising:
a plurality of cascaded shift registers, wherein each stage of the shift register has a signal outputting terminal connected with a corresponding gate line, and the signal outputting terminals of the rest stages of shift registers other than a shift register in a first stage and a shift register in a last stage are connected with a resetting signal terminal of the shift register in a previous stage and a signal inputting terminal of the shift register in a next stage, respectively;
a recovering signal line and a first reference signal line, extending along an arrangement direction of the plurality of cascaded shift registers; and
a plurality of recovering units, corresponding to the plurality of cascaded shift registers respectively, wherein each recovering unit has a signal input connectable with the first reference signal line, a signal output connectable with the gate line corresponding to its corresponding shift register, and a signal control connectable with the recovering signal line;
wherein upon recovering a failed shift register, the recovering unit corresponding to the failed shift register is configured to deliver a first reference signal provided from the first reference signal line to the corresponding gate line, under the control of the recovering signal line.

### Claim 2 (depends on 1)

The gate driving circuit of claim 1, wherein each recovering unit comprises a switch transistor,
wherein the switch transistor has a gate as the signal control, a source as the signal input and a drain as the signal output.

### Claim 3 (depends on 1)

The gate driving circuit of claim 1, wherein at least one of following conditions is satisfied before recovering the failed shift register:
the signal input of each recovering unit is disconnected from the first reference signal line;
the signal output of each recovering unit is disconnected from the gate line; and
the signal control of each recovering unit is disconnected from the recovering signal line.

### Claim 4 (depends on 1)

The gate driving circuit of claim 1, further comprising a second reference signal line extending along the arrangement direction of the plurality of cascaded shift registers;
before recovering the failed shift register, the signal input of each recovering unit is configured to connect with the first reference signal line, the signal output of each recovering unit is configured to connect with the corresponding gate line, and the signal control of each recovering unit is configured to connect with the second reference signal line and disconnect from the recovering signal line; and
after recovering the failed shift register, the signal control of the recovering unit corresponding to the failed shift register is configured to disconnect from the second reference signal line and connect with the recovering signal line.

### Claim 5 (depends on 3)

The gate driving circuit of claim 3, wherein the recovering signal line and the plurality of recovering units are arranged at a same one side of the signal outputting terminals of the shift registers.

### Claim 6 (depends on 4)

The gate driving circuit of claim 4, wherein the recovering signal line and the plurality of recovering units are arranged at a same one side of the signal outputting terminals of the shift registers.

### Claim 7 (depends on 5)

The gate driving circuit of claim 5, wherein the gate driving circuit comprises one recovering signal line, which is connectable with each gate line; or
the gate driving circuit comprises a plurality of the recovering signal lines, wherein each of recovering signal lines is connectable with a part of the gate lines.

### Claim 8 (depends on 6)

The gate driving circuit of claim 6, wherein
the gate driving circuit comprises one recovering signal line, which connectable with each gate line; or
the gate driving circuit comprises a plurality of the recovering signal lines, wherein each of recovering signal lines is connectable with part of the gate lines.

### Claim 9 (depends on 5)

The gate driving circuit of claim 5, wherein the first reference signal line is arranged at the same one side of the signal outputting terminals of the shift registers, and disconnected from any signal line or any terminal other than the signal inputs of the recovering units.

### Claim 10 (depends on 6)

The gate driving circuit of claim 6, wherein the first reference signal line is arranged at the same one side of the signal outputting terminals of the shift registers, and disconnected from any signal line or any terminal other than the signal inputs of the recovering units.

### Claim 11 (depends on 1)

An array substrate, comprising at least one group of the gate driving circuits of claim 1 arranged in a non-displaying area; and gate lines arranged in a displaying area, wherein the gate lines correspond to a signal outputting terminal of each of the plurality of cascaded shift registers, respectively.

### Claim 12 (depends on 11)

A method for recovering the array substrate of claim 11, comprising:
determining a failed shift register in the gate driving circuit of the array substrate;
disconnecting the signal outputting terminal of the failed shift register from a corresponding gate line, from the resetting signal terminal of the shift register in a previous stage, and from the signal inputting terminal of shift register in a next stage; and
enabling the signal control of the recovering unit corresponding to the failed shift register to be connected with the recovering signal line, enabling the signal input of the recovering unit to be connected with the first reference signal line, and enabling the signal output of the recovering unit to be connected with the corresponding gate line.

### Claim 13 (depends on 12)

The method of claim 12, further comprising:
enabling the signal control of the recovering unit corresponding to the failed shift register to be disconnected from a second reference signal line.