# US 2017/0256188 A1 · Display panel and method for verifying data lines thereon

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- Number: US 2017/0256188 A1
- Document ID: US20170256188A1
- Status: Published application
- Kind: A1
- Application number: 15/446,129
- Filed: 2017-03-01
- Published: 2017-09-07
- Earliest claimed: 2016-03-02
- Assignees: Au Optronics Corporation
- Applicants: AU Optronics Corporation
- Inventors: Cheng-Liang CHANG; Hsing-Lung LEE; Tsung-Jieh SHIAO; Che-Ming YANG; Yuh-Huah WANG
- Web page: https://patentgrep.com/patent/US20170256188A1

## CPC

- G09G 3/006: {Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309)}
- G09G 2300/0426: Layout of electrodes and connections
- G09G 2300/0809: Several active elements per pixel in active matrix panels
- G09G 2330/12: Test circuits or failure detection circuits included in a display system, as permanent part thereof
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

A display panel includes a substrate, a display area, N data lines, first switches, second switches, third switches, and fourth switches. A first peripheral circuit zone, a second peripheral circuit zone, and a display area are defined on a first surface of the substrate, and located between the first peripheral circuit zone and the second peripheral circuit zone. A display area circuit is located in the display area. Each of the N data lines crosses the display area circuit from the first peripheral circuit zone to the second peripheral circuit zone, and N is a positive integer greater than 1. The first switches are located in the first peripheral circuit zone. The second switches are located in the first peripheral circuit zone. The third switches are located on the first surface. The fourth switches are located in the second peripheral circuit zone.

## Claims

### Claim 1

A display panel, comprising:
a substrate, wherein a first peripheral circuit zone, a second peripheral circuit zone, and a display area are defined on a first surface of the substrate, and located between the first peripheral circuit zone and the second peripheral circuit zone;
a display area circuit, located in the display area;
N data lines, wherein each of the N data lines crosses the display area circuit from the first peripheral circuit zone to the second peripheral circuit zone, and N is a positive integer greater than 1;
first switches, located in the first peripheral circuit zone, selectively and electrically connect (2k−1)-th data lines of the N data lines to a first data end or a second data end according to a first signal, wherein k is a positive integer and is not greater than N/2;
second switches, located in the first peripheral circuit zone, selectively and electrically connect 2k-th data lines of the N data lines to the first data end or the second data end according to a second signal;
third switches, located on the first surface, selectively and electrically connect the 2k-th data lines of the N data lines to (2k+1)-th data lines of the N data lines according to a third signal; and
fourth switches, located in the second peripheral circuit zone, selectively and electrically connect the 2k-th data lines of the N data lines to the (2k−1)-th data lines of the N data lines according to a fourth signal.

### Claim 2 (depends on 1)

The display panel according to claim 1, wherein the second switches are located between the first switches and the display area circuit.

### Claim 3 (depends on 2)

The display panel according to claim 2, wherein the third switches are located in the first peripheral circuit zone.

### Claim 4 (depends on 3)

The display panel according to claim 3, wherein the third switches are located between the second switches and the display area circuit.

### Claim 5 (depends on 1)

The display panel according to claim 1, wherein the third switches are located in the second peripheral circuit zone.

### Claim 6 (depends on 5)

The display panel according to claim 5, wherein the third switches are located between the fourth switches and the display area circuit.

### Claim 7 (depends on 1)

The display panel according to claim 1, wherein the first signal and the fourth signal are the same, and the second signal and the third signal are the same.

### Claim 8 (depends on 1)

The display panel according to claim 1, wherein the first switches selectively and electrically connect (4m−3)-th data lines of the N data lines to the first data end, and to electrically connect (4m−1)-th data lines of the N data lines to the second data end, wherein in is a positive integer and is not greater than N/4.

### Claim 9 (depends on 1)

The display panel according to claim 1, wherein the second switches selectively and electrically connect (4m−2)-th data lines of the N data lines to the first data end, and to electrically connect (4m)-th data lines of the N data lines to the second data end, wherein m is a positive integer and is not greater than N/4.

### Claim 10 (depends on 1)

A method for verifying data lines on a display panel, applicable to the display panel according to claim 1, the method comprising:
providing a first voltage for the first data end;
providing a second voltage for the second data end, wherein the second voltage is different from the first voltage;
controlling the first switches and the fourth switches to operate in a first state;
controlling the second switches and the third switches to operate in a second state, wherein the first state is different from the second state; and
determining status of the N data lines according to a pattern shown in the display area.

### Claim 11 (depends on 10)

The method according to claim 10, wherein the first state is turn-on and the second state is turn-off, and the step of determining status of the N data lines comprises deciding whether the N data lines are broken and determining whether the 2x-th data lines and the (2x+1)-th data lines of the N data lines are short-circuited, wherein x is a positive integer and is less than N/2.

### Claim 12 (depends on 10)

The method according to claim 10, wherein the first state is turn-off and the second state is turn-on, and the step of determining status of the N data lines comprises deciding whether the N data lines are broken and determining whether the 2x-th data lines and the (2x−1)-th data lines of the N data lines are short-circuited, wherein x is a positive integer and is less than N/2.
