# US 2017/0255384 A1 · Efficient secure boot carried out in information processing apparatus > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2017/0255384 A1 - Document ID: US20170255384A1 - Status: Published application - Kind: A1 - Application number: 15/254,480 - Filed: 2016-09-01 - Published: 2017-09-07 - Earliest claimed: 2016-03-01 - Assignees: Kabushiki Kaisha Toshiba - Applicants: Kabushiki Kaisha Toshiba - Inventors: Mikio HASHIMOTO; Kentaro UMESAWA; Yoshiyuki AMANUMA - Web page: https://patentgrep.com/patent/US20170255384A1 ## CPC - G06F 3/061: {Improving I/O performance} - G06F 3/062: {Securing storage systems} - G06F 3/0637: {Permissions} - G06F 3/0665: {at area level, e.g. provisioning of virtual or logical volumes} - G06F 3/0673: {Single storage device} - G06F 9/4401: Bootstrapping (security arrangements therefor G06F21/57) - G06F 21/575: {Secure boot} - G11C 14/00: Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down - G11C 16/3459: {Circuits or methods to verify correct programming of nonvolatile memory cells} - G11C 16/22: Safety or protection circuits preventing unauthorised or accidental access to memory cells - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract An information processing apparatus includes a nonvolatile memory, a flag settable to a first value indicating that a program stored in a memory region of the nonvolatile memory has not been verified, and to a second value indicating that the program has been verified, a switching circuit configured to set the flag to the first value, in response to a request for permission to modify the program stored in the memory region, and a verification circuit that sets the flag to the second value upon verification of the program stored in the memory region, and upon restart of the information processing apparatus, carries out a verification process of the program prior to execution of the program if the first value is set in the flag, and executes the program without the verification process if the second value is set in the flag. ## Claims ### Claim 1 An information processing apparatus, comprising: a nonvolatile memory; a flag settable to a first value indicating that a program stored in a first memory region of the nonvolatile memory has not been verified, and to a second value indicating that the program has been verified; a switching circuit configured to set the flag to the first value, in response to a request for permission to modify the program stored in the first memory region; and a verification circuit that sets the flag to the second value upon verification of the program stored in the first memory region, and upon restart of the information processing apparatus, carries out a verification process of the program prior to execution of the program if the first value is set in the flag, and executes the program without carrying out the verification process if the second value is set in the flag. ### Claim 2 (depends on 1) The information processing apparatus according to claim 1, wherein the flag is stored in a second memory region of the nonvolatile memory that is different from the first memory region of the nonvolatile memory. ### Claim 3 (depends on 1) The information processing apparatus according to claim 1, further comprising: a second flag settable to a third value indicating that data writing to the first memory region is prohibited, and to a fourth value indicating that the data writing to the first memory region is allowed, wherein the third value is set in the second flag upon change of the flag from the second value to the first value, and the fourth value is set in the second flag when the verification process is carried out. ### Claim 4 (depends on 3) The information processing apparatus according to claim 3, wherein the second flag is stored in a volatile memory. ### Claim 5 (depends on 1) The information processing apparatus according to claim 1, wherein the memory region is non-writable when the third value is set in the second flag, and the memory region is writable when the fourth value is set in the second flag. ### Claim 6 (depends on 1) The information processing apparatus according to claim 1, wherein the program is executable when the verification process is successful, and not executable when the verification process fails. ### Claim 7 (depends on 1) The information processing apparatus according to claim 1, wherein during the verification process, the verification circuit calculates a hash value of the program stored in the memory region, extracts a hash value from a public key signature of the program, and compares the hash values. ### Claim 8 (depends on 1) The information processing apparatus according to claim 1, wherein a hash value extracted from a public key signature of the program is stored in another memory region of the nonvolatile memory, and during the verification process, the verification circuit calculates a hash value of the program stored in the memory region, and compares the stored hash value and the calculated hash value. ### Claim 9 (depends on 1) The information processing apparatus according to claim 1, further comprising: a processing unit that is provided separately from the verification circuit, wherein the verification circuit is configured to carry out the verification process in response to a verification request from the processing unit. ### Claim 10 (depends on 1) The information processing apparatus according to claim 1, further comprising: a non-rewritable nonvolatile memory that stores a verification program, wherein the verification circuit carries out the verification process in accordance with the verification program. ### Claim 11 A method for operating an information processing apparatus including a nonvolatile memory and a flag settable to a first value indicating that a program stored in a first memory region of the nonvolatile memory has not been verified, and to a second value indicating that the program has been verified, the method comprising: setting the flag to the first value, in response to a request for permission to modify the program stored in the memory region, and then setting the flag to the second value if verification of the program stored in the first memory region is carried out and the verification is successful; and upon restart of the information processing apparatus, carrying out a verification process of the program prior to execution of the program if the first value is set in the flag, and executing the program without carrying out the verification process if the second value is set in the flag. ### Claim 12 (depends on 11) The method according to claim 11, wherein the flag is stored in a second memory region of the nonvolatile memory that is different from the first memory region of the nonvolatile memory. ### Claim 13 (depends on 11) The method according to claim 11, wherein the information processing apparatus also includes a second flag settable to a third value indicating that data writing to the first memory region is prohibited, and to a fourth value indicating that the data writing the first memory region is allowed, and the method further comprises: setting the third value in the second flag upon change of the flag from the second value to the first value; and then setting the fourth value in the second flag when the verification process is carried out. ### Claim 14 (depends on 13) The method according to claim 13, wherein the second flag is stored in a volatile memory. ### Claim 15 (depends on 11) The method according to claim 11, wherein the memory region is non-writable when the third value is set in the second flag, and the memory region is writable when the fourth value is set in the second flag. ### Claim 16 (depends on 11) The method according to claim 11, wherein the program is executable when the verification process is successful, and not executable when the verification process fails. ### Claim 17 (depends on 11) The method according to claim 11, wherein the verification process comprises: calculating a hash value of the program stored in the memory region; extracting a hash value from a public key signature of the program; and comparing the hash values. ### Claim 18 (depends on 11) The method according to claim 11, wherein a hash value extracted from a public key signature of the program is stored in another memory region of the nonvolatile memory, and the verification process comprising: calculating a hash value of the program stored in the memory region; and comparing the stored hash value and the calculated hash value. ### Claim 19 (depends on 11) The method according to claim 11, further comprising: issuing a verification request from a processing unit, wherein the verification process is carried out in response to the verification request by a verification circuit that is provided separately from the processing unit. ### Claim 20 (depends on 11) The method according to claim 11, wherein the information processing apparatus further includes a non-rewritable nonvolatile memory that stores a verification program, and the verification process is carried out in accordance with the verification program.