Variable resistance memory devices and methods of manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsKyu-Rie SIM, Dae-Hwan KANG, Gwan-Hyeob KOH
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Abstract
A variable resistance memory device includes first memory cells and second memory cells. The first memory cells are between first and second conductive lines, and at areas at which the first and second conductive lines overlap. The second memory cells are between the second and third conductive lines, and at areas at which the second and third conductive lines overlap. Each first memory cell includes a first variable resistance pattern and a first selection pattern. Each second memory cell includes a second variable resistance pattern and a second selection pattern. At least one of the second memory cells is shifted from a closest one of the first memory cells.
Claims27
A variable resistance memory device, comprising:
- first conductive lines arranged in a first direction on a substrate, each of the first conductive lines extending in a second direction crossing the first direction, and the first and second directions being parallel to an upper surface of the substrate;
- second conductive lines arranged in the second direction on the first conductive lines, each of the second conductive lines extending in the first direction;
- third conductive lines arranged in the first direction on the second conductive lines, each of the third conductive lines extending in the second direction;
- first memory cells between the first and second conductive lines, the first memory cells at respective areas at which the first and second conductive lines overlap in a third direction, the third direction substantially perpendicular to the upper surface of the substrate, and each of the first memory cells including a first variable resistance pattern and a first selection pattern;
- and
- second memory cells between the second and third conductive lines, the second memory cells at respective areas at which the second and third conductive lines overlap in the third direction, and each of the second memory cells including a second variable resistance pattern and a second selection pattern, wherein
- at least one of the second memory cells is shifted from a closest one of the first memory cells in the first direction or in the second direction in a plan view.
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22-29. (canceled)
A variable resistance memory device, comprising:
- first conductive lines arranged in a first direction on a substrate, each of the first conductive lines extending in a second direction crossing the first direction, and the first and second directions being parallel to an upper surface of the substrate;
- second conductive lines arranged in the second direction on the first conductive lines, each of the second conductive lines extending in the first direction;
- third conductive lines arranged in the first direction on the second conductive lines, each of the third conductive lines extending in the second direction;
- first memory cells between the first and second conductive lines, the first memory cells at respective areas at which the first and second conductive lines overlap in a third direction, the third direction substantially perpendicular to the upper surface of the substrate, and each of the first memory cells including a first variable resistance pattern and a first selection pattern;
- and
- second memory cells between the second and third conductive lines, the second memory cells at respective areas at which the second and third conductive lines overlap in the third direction, and each of the second memory cells including a second variable resistance pattern and a second selection pattern;
- wherein
- a portion of a lower surface of at least one of the second memory cells overlaps a portion of an upper surface of at least one of the first memory cells in the third direction.
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A semiconductor device comprising:
- a plurality of memory cells arranged in a plurality of rows and columns on a surface of a substrate, the plurality of rows of memory cells arranged in a first direction parallel to the surface of the substrate and the plurality of columns of memory cells arranged in a second direction parallel to the surface of the substrate, at least a first of the plurality of rows of memory cells including a plurality of upper memory cells and a plurality of lower memory cells, the plurality of upper memory cells arranged at a first distance from the surface of the substrate in a third direction, and the plurality of lower memory cells arranged at a second distance from the surface of the substrate in the third direction;
- wherein
- the first direction, the second direction and the third direction are perpendicular to one another,
- the plurality of upper memory cells are not aligned with the plurality of lower memory cells in the third direction, and
- the first distance is greater than the second distance.
Dependencies are inferred from the claim text.