Ldmos transistor
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChun-Ching Wu, Po-Jen Wang
Life of this patent
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Abstract
A MOS transistor includes a substrate, a first region, a second region, a source region, a drain region, an active gate stack, and a dummy gate stack. The substrate has a first conductivity. The first region having the first conductivity is formed in the substrate. The second region having a second conductivity is formed in the substrate and is adjacent to the first region. The source region with the second conductivity is formed in the first region. The drain region with the second conductivity is formed in the second region. The active gate stack is disposed on the first region. The dummy gate stack is disposed on the second region, and the dummy gate stack is electrically coupled to a variable voltage.
Claims20
A MOS transistor, comprising:
- a substrate of a first conductivity;
- a first region of the first conductivity formed in the substrate;
- a second region of a second conductivity formed in the substrate, the second region being adjacent to the first region;
- a source region of the second conductivity formed in the first region;
- a drain region of the second conductivity formed in the second region;
- an active gate stack disposed on the first region;
- and
- a dummy gate stack disposed on the second region, the dummy gate stack being electrically coupled to a variable voltage.
A MOS transistor, comprising:
- a substrate of a first conductivity;
- a first region of the first conductivity formed in the substrate;
- a second region of a second conductivity formed in the substrate, the second region being adjacent to the first region;
- a third region of the first conductivity formed in the substrate, the third region being adjacent to the second region;
- a first source region of the second conductivity in the first region;
- a drain region of the second conductivity in the second region;
- a second source region of the second conductivity in the third region;
- a first active gate stack disposed on the first region;
- a second active gate stack disposed on the third region;
- a first dummy gate stack disposed on the second region between the first source region and the drain region, the first dummy gate stack being electrically coupled to a first variable voltage;
- and
- a second dummy gate stack disposed on the second region between the second source region and the drain region, the second dummy gate stack being electrically coupled to a second variable voltage.
A MOS transistor, comprising:
- a substrate of a first conductivity;
- a source region of a second conductivity formed in the substrate;
- a drain region of the second conductivity formed in the substrate, the source region and the drain region being separated from each other;
- a channel region of the first conductivity formed in the substrate and between the source region and the drain region;
- an extended drift region of the second conductivity formed in the substrate around the drain region;
- an active gate stack disposed on the channel region;
- and
- a dummy gate stack disposed on the extended drift region, the dummy gate stack being electrically coupled to a variable voltage.
Dependencies are inferred from the claim text.