FinFET Having Isolation Structure and Method of Forming the Same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChia-Chung Chen, Fu-Huan Tsai, Feng Yuan
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Abstract
A transistor includes a substrate having an upper surface, a fin structure protruding from the upper surface of the substrate, a first isolation structure over the upper surface of the substrate, and a second isolation structure. The fin structure extends along a first direction and comprising a lower portion and an upper portion. The first isolation structure surrounds the lower portion of the fin structure. The second isolation structure is at least partially embedded in the upper portion of the fin structure.
Claims20
A method of making a transistor, comprising:
- forming a fin structure protruding from an upper surface of a substrate, the fin structure extending along a first direction and comprising a lower portion and an upper portion;
- forming a first isolation structure over the upper surface of the substrate and surrounding the lower portion of the fin structure;
- patterning a recess in the fin structure;
- and
- depositing a second isolation structure in the recess.
A method of making a transistor, comprising:
- forming a fin structure protruding from an upper surface of a substrate, the fin structure comprising a lower portion and an upper portion;
- forming a gate structure over the fin structure, the gate structure and the fin structure defining a drain region in the upper portion of the fin structure and a source region in the upper portion of the fin structure;
- patterning a recess in the drain region of the fin structure;
- and
- forming an isolation structure in the recess, wherein the isolation structure comprises a dielectric material, and wherein the fin structure surrounds the isolation structure in a top-down view.
A method comprising:
- forming a semiconductor fin extending upwards from a substrate;
- forming a gate stack over and along sidewalls of a first portion of the semiconductor fin;
- after forming the gate stack, etching a recess in a second portion of the semiconductor fin;
- and
- filling the recess with a dielectric material to define an isolation structure extending into the semiconductor fin, wherein top surfaces of the second portion of the semiconductor fin and the isolation structure are substantially level.
Dependencies are inferred from the claim text.