Sidewall Spacers for Self-Aligned Contacts
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJyun-Ming LIN, Hua Feng CHEN, Kuo-Hua PAN, Min-Yann HSIEH, C.H. WU
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Abstract
A semiconductor device and method for fabricating such a device are presented. The semiconductor device includes a first gate electrode of a transistor, a first sidewall spacer along a sidewall of the gate pattern, a first insulating layer in contact with the first sidewall spacer and having a planarized top surface, and a second sidewall spacer formed on the planarized top surface of the first insulating layer. The second sidewall spacer may be formed over the first sidewall spacer. A width of the second sidewall spacer is equal to or greater than a width of the first sidewall spacer.
Claims21
1-11. (canceled)
A method of fabricating a semiconductor device on a substrate, comprising:
- forming a conductive gate pattern over a previously formed conductive gate pattern;
- forming a first sidewall spacer on a sidewall of the conductive gate pattern, the first sidewall spacer being over a second sidewall spacer that is on a sidewall of the previously formed conductive gate pattern, wherein a width of the first sidewall spacer is equal to or greater than a width of the second sidewall spacer.
A method of fabricating a semiconductor device on a substrate, comprising:
- patterning a first conductive gate layer to form a first gate pattern;
- forming a first sidewall spacer on a sidewall of the first gate pattern;
- depositing a first insulating layer over the first conductive gate layer and the first sidewall spacer;
- polishing a top surface of the first insulating layer;
- forming a second gate pattern aligned over the first gate pattern;
- forming a second sidewall spacer on a sidewall of the second gate pattern, wherein a width of the second sidewall spacer is equal to or greater than a width of the first sidewall spacer.
A method of fabricating a finFET device, comprising:
- patterning a first conductive gate layer to form a first gate pattern over a fin that extends above a surface of a substrate;
- forming a first sidewall spacer on a sidewall of the first gate pattern;
- depositing a first insulating layer over the first conductive gate layer and the first sidewall spacer;
- polishing a top surface of the first insulating layer;
- forming a second gate pattern aligned over the first gate pattern;
- forming a second sidewall spacer on a sidewall of the second gate pattern, wherein a width of the second sidewall spacer is equal to or greater than a width of the first sidewall spacer.
Dependencies are inferred from the claim text.