Semiconductor device
AssigneeSamsung Electronics Co., Ltd.
InventorsDong-woo KIM, Hyun-jung LEE, Sun-jung KIM, Seung-hun LEE, Keum-seok PARK, Edward Namkyu CHO
Life of this patent
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Abstract
A semiconductor device includes a fin-type active area, nanosheets, a gate, a source/drain region, and insulating spacers. The fin-type active area protrudes from a substrate in a first direction. The nanosheets are spaced from an upper surface of the fin-type active area and include channel regions. The gate is over the fin-type active area. The source/drain region is connected to the nanosheets. The insulating spacers are in the fin-type active area and between the nanosheets. Air spaces are between the insulating spacers and the source/drain region based on positions of the insulating spacers.
Claims20
A semiconductor device, comprising:
- a fin-type active area protruding from a substrate in a first direction;
- a plurality of nanosheets spaced from and extending parallel to an upper surface of the fin-type active area, each of the nanosheets including a channel region;
- a gate extending over the fin-type active area in a second direction crossing the first direction and surrounding at least some of the nanosheets;
- a source/drain region connected to the nanosheets;
- and
- insulating spacers disposed between the upper surface of the fin-type active area and the nanosheets, disposed between the nanosheets, wherein air spaces are between the insulating spacers and the source/drain region based on positions of the insulating spacers.
A semiconductor device, comprising:
- a substrate including an active area;
- at least one nanosheet stack structure spaced from and facing an upper surface of the active area, the at least one nanosheet stack structure including a plurality of nanosheets, each of the nanosheets including a channel region;
- a gate extending over the active area in a second direction and covering the at least one nanosheet stack structure, the gate including a first gate portion on the at least one nanosheet stack structure and a plurality of second gate portions, each of the plurality of second gate portions being under a lower side of each of the nanosheets;
- a gate dielectric layer between the at least one nanosheet stack structure and the gate;
- a source/drain region connected to one end of each of neighboring ones of the nanosheets;
- a first insulating spacer on the nanosheets and covering side walls of the gate;
- and
- a plurality of second insulating spacers disposed between the gate and the source/drain region, disposed between the upper surface of the active area and the at least one nanosheet stack structure, and disposed between the nanosheets, wherein a plurality of air spaces are disposed between the plurality of second insulating spacers and the source/drain region based on positions of the second insulating spacers.
A semiconductor device, comprising:
- a substrate including an active area;
- at least one nanosheet stack structure spaced from and facing an upper surface of the active area, the at least one nanosheet stack structure including a plurality of nanosheets, each of the nanosheets including a channel region;
- a gate extending over the active area in a second direction and covering the at least one nanosheet stack structure, the gate including a first gate portion on the at least one nanosheet stack structure and a plurality of second gate portions on a lower side of each of the nanosheets;
- a source/drain region connected to one end of each of neighboring ones of the nanosheets;
- and
- a plurality of first insulating spacers between the gate and the source/drain region in spaces between the upper surface of the active area and the at least one nanosheet stack structure and spaces between the nanosheets, wherein a plurality of air spaces are between the first insulating spacers and the source/drain region.
Dependencies are inferred from the claim text.