Edge termination for super-junction mosfets
AssigneeVishay-Siliconix
InventorDeva PATTANAYAK
Life of this patent
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Abstract
Edge termination for MOSFETs. In accordance with an embodiment of the present invention, a metal oxide semiconductor field effect transistor (MOSFET) includes a core region including a plurality of parallel core plates coupled to a source terminal of the MOSFET. The MOSFET also includes a termination region surrounding the core region comprising a plurality of separated floating termination segments configured to force breakdown into the core region and not in the termination region. Each termination segment has a length dimension less than a length dimension of the core plates.
Claims19
A metal oxide semiconductor field effect transistor (MOSFET) comprising:
- a core region comprising a plurality of parallel core plates coupled to a source terminal of said super-junction MOSFET;
- and
- a termination region surrounding said core super-junction region comprising a plurality of separated floating termination segments configured to force breakdown into said core super-junction region and away from said termination region,
- wherein each of said termination segments has a length dimension less than a length dimension of said core plates.
A metal oxide semiconductor field effect transistor (MOSFET) comprising:
- a core region formed in a substrate of first conductivity type, below an active region of said MOSFET, said core region comprising:
- a plurality of parallel core plates of a second conductivity type coupled to a source terminal of said MOSFET, each of said plates having a plate width;
- said core plates alternating with regions of said first conductivity having a width of about said plate width;
- a termination region surrounding said core region comprising:
- a plurality of separated floating termination segments of said second conductivity type formed in said substrate, separated from one another by regions of said first conductivity type,
- wherein each of said termination segments has a length dimension less than a length dimension of said core plates, and
- wherein said termination region is configured to have a higher breakdown voltage than said core region.
A metal oxide semiconductor field effect transistor (MOSFET) comprising:
- a substrate of first conductivity;
- a plurality of gate trenches descending beneath a surface of said substrate,
- wherein each gate trench comprises one or more gates of said MOSFET;
- source and body regions of said MOSFET in a mesa between said gate trenches;
- a drift region below said gate trenches and below said source and body regions, said drift region comprising:
- a plurality of core plates of a second conductivity alternating with regions of said first conductivity, wherein said core plates are coupled to said source regions of said MOSFET;
- a termination region surrounding said drift region at about the same depth as said drift region, said termination region comprising:
- a plurality of separated floating termination segments of said second conductivity formed in said substrate, separated from one another by regions of said first conductivity,
- wherein there are no gates of said MOSFET above said termination region, and
- wherein each of said termination segments has a length dimension not greater than a length dimension of said core plates.
Dependencies are inferred from the claim text.