Array substrate for display device and manufacturing method thereof
AssigneeLG Display Co., Ltd.
InventorsSunHyun Choi, KiTaeg Shin, ChelHee Jo, TaeYun Roh
Life of this patent
Estimating the term…
Abstract
The present disclosure provides an array substrate for a display device and a manufacturing method thereof. A transparent electrode pattern (ITO) may be formed between a source/drain metal pattern and a passivation layer located above the source/drain metal pattern, which are formed in a passivation hole area of a non-active area of the array substrate. Accordingly, it may be possible to prevent display failure caused by a delamination phenomenon or peel-off of a material of the passivation layer due to the lack of adhesion strength between a metal layer and the passivation layer in the passivation hole area.
Claims17
A method of manufacturing an array substrate for a display device, comprising:
- providing an array substrate including:
- an active area including a thin film transistor area;
- and
- a non-active area including a passivation hole area;
- forming a gate insulator, a source/drain metal pattern, and a lower passivation layer in sequence in the passivation hole area included in the non-active area;
- exposing the source/drain metal pattern by removing a part of the lower passivation layer in the passivation hole area;
- forming a lower transparent electrode pattern on the exposed source/drain metal pattern in the passivation hole area;
- and
- forming an upper passivation layer on the lower transparent electrode pattern in the passivation hole area.
A method of manufacturing an array substrate for a display device, comprising:
- providing an array substrate including:
- an active area including the thin film transistor area;
- and
- a non-active area including a passivation hole area;
- forming a gate metal pattern on the array substrate;
- forming a gate insulator on the gate metal pattern;
- depositing a semiconductor layer and a source/drain layer on the gate insulator;
- forming a source/drain metal pattern in both the active area and the non-active area;
- depositing a lower passivation layer in both the active area and the non-active area;
- forming the passivation hole by removing a part of the lower passivation layer in the passivation hole area;
- depositing a lower transparent electrode layer in both the active area and the non-active area;
- patterning the lower transparent electrode layer to form the lower transparent electrode pattern on the source/drain metal pattern in the passivation hole area;
- and
- forming an upper passivation layer in both the active area and the non-active area.
Dependencies are inferred from the claim text.