Non-Volatile Memory With Silicided Bit Line Contacts
AssigneeCypress Semiconductor Corporation
InventorsChing-Huang LU, Simon S. Chan, Hidehiko Shiraiwa, Lei Xue
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Abstract
An approach to use silicided bit line contacts that do not short to the underlying substrate in memory devices. The approach provides for silicide formation in the bit line contact area, using a process that benefits from being self-aligned to the oxide-nitride-oxide (ONO) nitride edges. A further benefit of the approach is that the bit line contact implant and rapid temperature anneal process can be eliminated. This approach is applicable to embedded flash, integrating high density devices and advanced logic processes.
Claims6
1-20. (canceled)
A memory device comprising:
- a substrate comprising:
- a plurality of bit lines, and
- a plurality of body regions, wherein the pluralities of bit lines and body regions alternate along at least one axis;
- a dielectric stack formed on at least one body region;
- and
- a gate layer formed on the dielectric stack.
A method of forming a memory device, the method comprising:
- disposing a plurality of bit lines within a substrate;
- disposing a plurality of body regions within the substrate, the pluralities of bit lines and body regions substantially alternating;
- disposing a dielectric stack on at least one body region;
- disposing a gate layer on the dielectric stack.
Dependencies are inferred from the claim text.