Dynamic memory structure

A dynamic memory structure, comprising:

• a substrate;
• a first strip semiconductor material disposed on said substrate and extending along a first direction;
• a gate standing astride said first strip semiconductor material according to a shape of said first strip semiconductor material, extending along a second direction and dividing said first strip semiconductor material into a first source terminal, a first drain terminal and a first channel region;
• a first dielectric layer sandwiched between said gate and said first strip semiconductor material, wherein a first thickness of said first dielectric layer on a top surface of said first strip semiconductor material is different from a second thickness of said first dielectric layer on a sidewall of said first strip semiconductor material;
• a first capacitor unit disposed on said substrate and comprising said first source terminal serving as a bottom electrode, a second dielectric layer covering said first source terminal to serve as a capacitor dielectric layer and a capacitor metal layer covering said second dielectric layer to serve as a top electrode;
• and
• an insulating material disposed adjacently to said first strip semiconductor material, wherein a bottom surface of said insulating material is lower than a bottom surface of said first strip semiconductor material.