Integrating vlsi-compatible fin structures with selective epitaxial growth and fabricating devices thereon

An integrated circuit structure, comprising:

• a first semiconductor layer above a substrate, the first semiconductor layer having a top surface and sidewalls;
• a second semiconductor layer on the top surface of first semiconductor layer, the second semiconductor layer comprising a semiconductor material different than the first semiconductor layer, and the second semiconductor layer having a top surface and sidewalls, the sidewalls of the second semiconductor layer substantially vertically aligned with the sidewalls of the first semiconductor layer;
• a first semiconductor fin on the top surface of second semiconductor layer, the first semiconductor fin comprising a semiconductor material different than the first semiconductor layer and different than the second semiconductor layer;
• a third semiconductor layer above the substrate and laterally adjacent to the first semiconductor layer, the third semiconductor layer having a top surface and sidewalls, the third semiconductor layer comprising a semiconductor material different than the semiconductor material of the first semiconductor fin, different than the second semiconductor layer and different than the first semiconductor layer;
• a fourth semiconductor layer on the top surface of third semiconductor layer and laterally adjacent to the second semiconductor layer, the fourth semiconductor layer comprising a semiconductor material different than the third semiconductor layer, different than the semiconductor material of the first semiconductor fin, different than the second semiconductor layer and different than the first semiconductor layer, and the fourth semiconductor layer having a top surface and sidewalls, the sidewalls of the fourth semiconductor layer substantially vertically aligned with the sidewalls of the third semiconductor layer;
• and
• a second semiconductor fin on the top surface of fourth semiconductor layer, the second semiconductor fin comprising a semiconductor material different than the fourth semiconductor layer, different than the third semiconductor layer, different than the semiconductor material of the first semiconductor fin, different than the second semiconductor layer and different than the first semiconductor.