Semiconductor intergrated curcuit apparatus and manufacturing method for same

A manufacturing method for a semiconductor integrated circuit apparatus, characterized by comprising:

• forming a number of element forming regions that are isolated from each other by an element isolation region in a semiconductor substrate;
• introducing impurities of a first conductivity type into at least two element forming regions from among the element forming regions so as to form a first well region of the first conductivity type for forming a low voltage drive transistor and a second well region of the first conductivity type for a high voltage drive transistor that is driven by a voltage higher than that of the transistor formed in the first well region of the first conductivity type;
• introducing impurities into the semiconductor substrate in such a state that the second well region of the first conductivity type and a portion of the first well region of the first conductivity type are masked so as to form a first channel dope region of the first conductivity type on the surface of another portion of the first well region of the first conductivity type;
• forming a first gate electrode in the first channel dope region with a first gate insulating film in between, and at the same time forming a second gate electrode in the second well region of the first conductivity type with a second gate insulating film in between;
• introducing impurities into the second well region of the first conductivity type using the second gate electrode as a mask so as to form a low concentration source/drain region of a second conductivity type that is a conductivity type opposite to the first conductivity type, and at the same time masking the first channel dope region in the first well region of the first conductivity type so as to form a first resistor forming layer of the second conductivity type;
• introducing impurities into the first channel dope region using the first gate electrode as a mask so as to form a first extension region of the second conductivity type;
• and introducing impurities into the first well region of the first conductivity type and the second well region of the first conductivity type using side walls of the first gate electrode and the second gate electrode as well as an insulating film pattern selectively provided on the first resistor forming layer as a mask so as to form a first source region and a first drain region of the second conductivity type of which the concentration is higher than that in the low concentration source/drain region as well as a second source region and a second drain region of the second conductivity type, of which the concentration is higher than that of the low concentration source/drain region, respectively, and thus converting the first resistor forming layer beneath the insulating film pattern to a first ballast resistor.