Semiconductor Device and Method of Manufacture
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChen-Hua Yu, Tin-Hao Kuo, Chung-Shi Liu, Hao-Yi Tsai
Life of this patent
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Abstract
A semiconductor device has a top metal layer, a first passivation layer over the top metal layer, a first redistribution layer over the first passivation layer, a first polymer layer, and a first conductive via extending through the first polymer layer. The first polymer layer is in physical contact with the first passivation layer.
Claims21
A method of manufacturing a semiconductor device, the method comprising:
- applying a first polymer layer over a first redistribution layer, the first redistribution layer being located over a semiconductor substrate;
- patterning the first polymer layer to expose at least a portion of the first redistribution layer;
- forming a first conductive via through the first polymer layer and in electrical connection with the first redistribution layer;
- encapsulating the semiconductor substrate with an encapsulant after the forming the first conductive via, wherein the encapsulant is not in physical contact with the first conductive via, and wherein a top surface of the first conductive via extends above a top surface of the encapsulant;
- depositing a second polymer layer over the encapsulant and in physical contact with the first conductive via;
- and
- forming a first fan-out redistribution layer over and through the second polymer layer.
A method of manufacturing a semiconductor device, the method comprising:
- forming active devices onto a first side of a semiconductor substrate;
- forming a plurality of metallization layers over the active devices, wherein the plurality of metallization layers has a top metal layer, the top metal layer being further away from the semiconductor substrate than a remainder of the plurality of metallization layers;
- forming a first passivation layer in physical contact with the top metal layer, wherein the first passivation layer is the first passivation layer over the semiconductor substrate and wherein the first passivation layer comprises a first dielectric material throughout the first passivation layer;
- forming a first redistribution layer in electrical connection with the top metal layer, wherein the first redistribution layer comprises a first material;
- forming a first protective layer over the first redistribution layer and in physical contact with the first passivation layer;
- forming a first conductive via through the first protective layer and in physical contact with the first redistribution layer, the first conductive via comprising a second material different from the first material and having a thickness of less than about 10 μm;
- after forming the first conductive via, encapsulating the semiconductor substrate with an encapsulant such that a top surface of the encapsulant is below a top surface of the first conductive via, wherein after the encapsulating the first conductive via is free from contact with the encapsulant;
- depositing a second protective layer over the first conductive via and the encapsulant;
- and
- forming a post-passivation interconnect over the second protective layer, the post-passivation interconnect in electrical connection with the first conductive via and extending over the encapsulant.
The method of claim ii, wherein the composite material comprises a layer of silicon oxide and a layer of silicon nitride.
15-20. (canceled)
A method of manufacturing a semiconductor device, the method comprising:
- forming a top metal layer over a semiconductor substrate;
- depositing a first passivation layer over and in physical contact with the top metal layer;
- forming a first redistribution layer over and in physical contact with the first passivation layer;
- depositing a first polymer layer over and in physical contact with the first redistribution layer;
- forming a first conductive via extending through the first polymer layer and in electrical connection with the first redistribution layer, the first conductive via have a thickness of no greater than 10 μm;
- and
- after forming the first conductive via, placing an encapsulant in physical contact with the semiconductor substrate, the first passivation layer, and the first polymer layer, wherein the first conductive via is laterally separated from the encapsulant and a top surface of the first electrode is disposed higher than a top surface of the encapsulant.
Dependencies are inferred from the claim text.