Power Supply Transient Performance (Power Integrity) for a Probe Card Assembly in an Integrated Circuit Test Environment

(canceled)

An Improved Power Supply Transient Performance (power integrity) structure for a Probe Card Assembly in an Integrated Circuit Test Environment, comprising a thin pitch translator substrate formed of thin build-up layers;

• passive components embedded directly into the pitch translation substrate pitch translation substrate, said substrate being compatible with said components embedding and further comprising thin redistribution layers built-up between said passive components and a lower or bottom surface of said pitch translation substrate, said thin layers providing a closest possible location of said passive embedded components to a wafer/die so that the passive components are in close proximity to said pitch translation substrate so that low impedance to a high frequency permits a die to operate at package-level speed, thereby reducing yield loss at a packaging level.

A method for improving a Power Supply Transient Performance (power integrity) structure for a Probe Card Assembly in an Integrated Circuit Test Environment, the steps comprising:

• Providing a thin pitch translator substrate;
• and
• Locating passive components within an interposer that also acts as an attach mechanism between the pitch translation substrate and the probe card so that the passive components are in close proximity to said pitch translation substrate so that low impedance to a high frequency permits a die to operate at package-level speed, thereby reducing yield loss at a packaging level.

A method for improving a Power Supply Transient Performance (power integrity) structure for a Probe Card Assembly in an Integrated Circuit Test Environment, the steps comprising

• Fully embedding a structure including passive components directly to a pitch translation substrate formed of thin build-up layers, so that the passive components are in close proximity to said pitch translation substrate so that low impedance to a high frequency permits a die to operate at package-level speed, thereby reducing yield loss at a packaging level.