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AssigneeIntel Corporation
InventorsJames Mathew, Yunjun Ho, Zhiqiang Xie, Hyun Sik Kim
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A disclosed example to modulate slit stress in a semiconductor substrate includes controlling a first process to apply a first material to a semiconductor substrate. The semiconductor substrate includes a slit between adjacent stacked transistor layers. The first material coats walls of the slit to reduce a first width of the slit between the adjacent stacked transistor layers to a second width. A second process is controlled to apply a second material to the semiconductor substrate. The second material is to be deposited in the second width of the slit. The first material and the second material are to form a solid structure in the slit between the adjacent stacked transistor layers.
A method to modulate slit stress in a semiconductor substrate, the method comprising:
At least one article of manufacture comprising machine readable instructions that, when executed, cause a processor to at least:
An integrated circuit die comprising:
Dependencies are inferred from the claim text.