Controller of semiconductor memory device and method of operating the same
AssigneeSK hynix Inc.
InventorSu Min YI
Life of this patent
Estimating the term…
Abstract
There are provided an electronic device, and more particularly, to a memory system capable of detecting transmission errors and a method of operating the same. The method of operating the controller configured to control the semiconductor memory device includes generating reception count information by counting a number of bits of a predetermined value of data received from the semiconductor memory device, requesting the semiconductor memory device to transmit transmission count information representing a number of bits of the predetermined value of the data transmitted by the semiconductor memory device and determining whether transmission errors are included in the received data based on the reception count information and the transmission count information.
Claims16
A method of operating a controller configured to control a semiconductor memory device, the method comprising:
- generating reception count information by counting a number of bits of a predetermined value of data received from the semiconductor memory device;
- requesting the semiconductor memory device to transmit transmission count information representing a number of bits of the predetermined value of the data transmitted by the semiconductor memory device;
- and
- determining whether transmission errors are included in the received data based on the reception count information and the transmission count information.
A controller configured to control a semiconductor memory device, the controller comprising:
- a count information generator configured to generate reception count information by counting a number of bits of a predetermined value of data received from the semiconductor memory device;
- and
- a processor configured to request the semiconductor memory device to transmit transmission count information representing a number of bits of the predetermined value of the data transmitted by the semiconductor memory device, and to determine whether transmission errors are included in the received data based on the reception count information and the transmission count information.
A memory system comprising:
- a semiconductor memory device configured to transmit data stored in a plurality of memory cells, and to generate transmission count information by counting a number of bits of a predetermined value of the transmitted data;
- and
- a controller configured to generate reception count information by counting a number of bits of the predetermined value of data received from the semiconductor memory device, and to detect transmission errors of the received data based on the transmission count information and the reception count information.
Dependencies are inferred from the claim text.