Software-assisted instruction level execution preemption
AssigneeNVIDIA Corporation
InventorsPhilip Alexander Cuadra, Christopher Lamb, Lacky V. Shah
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AssigneeNVIDIA Corporation
InventorsPhilip Alexander Cuadra, Christopher Lamb, Lacky V. Shah
Estimating the term…
One embodiment of the present invention sets forth a technique for instruction level execution preemption. Preempting at the instruction level does not require any draining of the processing pipeline. No new instructions are issued and the context state is unloaded from the processing pipeline. Any in-flight instructions that follow the preemption command in the processing pipeline are captured and stored in a processing task buffer to be reissued when the preempted program is resumed. The processing task buffer is designated as a high priority task to ensure the preempted instructions are reissued before any new instructions for the preempted context when execution of the preempted context is restored.
A method of preempting execution of program instructions in a multi-threaded system, the method comprising:
A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to preempt execution of program instructions in a multi-threaded system, by performing the steps of:
A multi-threaded system for preempting execution of program instructions, the multi-threaded system comprising:
Dependencies are inferred from the claim text.