Method for operating a microprocessor

A microprocessor, comprising:

• an arrangement for performing a binary translation by a conversion software implemented in the microprocessor, the binary translation including translating a source instruction in a binary manner into a target instruction, wherein the source instruction is encoded according to a first instruction-set architecture, and wherein the target instruction is encoded according to a second instruction-set architecture;
• an arrangement for replicating by the conversion software the target instruction translated into the second instruction-set architecture;
• an arrangement for, in the replicated target instruction, replacing a memory area which is to be accessed in the course of executing the target instruction by a second memory area;
• and
• an arrangement for executing the target instruction and the replicated target instruction.

A computer program which induces an arithmetic unit to execute a method for operating a microprocessor, the method comprising:

• performing a binary translation by a conversion software implemented in the microprocessor, the binary translation including translating a source instruction in a binary manner into a target instruction, wherein the source instruction is encoded according to a first instruction-set architecture, and wherein the target instruction is encoded according to a second instruction-set architecture;
• replicating by the conversion software the target instruction translated into the second instruction-set architecture;
• in the replicated target instruction, replacing a memory area which is to be accessed in the course of executing the target instruction by a second memory area;
• and
• executing the target instruction and the replicated target instruction by the microprocessor.

A machine-readable memory medium having a computer program stored therein. The computer program inducing an arithmetic unit to execute a method for operating a microprocessor, the method comprising:

• performing a binary translation by a conversion software implemented in the microprocessor, the binary translation including translating a source instruction in a binary manner into a target instruction, wherein the source instruction is encoded according to a first instruction-set architecture, and wherein the target instruction is encoded according to a second instruction-set architecture;
• replicating by the conversion software the target instruction translated into the second instruction-set architecture;
• in the replicated target instruction, replacing a memory area which is to be accessed in the course of executing the target instruction by a second memory area;
• and
• executing the target instruction and the replicated target instruction by the microprocessor.