Apparatus and method for monitoring and predicting reliability of an integrated circuit

An apparatus comprising:

• a conductor formed on a metal layer;
• a switch having a source terminal coupled to the conductor, and a drain terminal coupled to a power supply node, wherein the switch is controllable by a controller;
• and
• a comparator having a first input coupled to the power supply node and to the switch, wherein the comparator includes a second input coupled to an adjustable reference.

A system comprising:

• a memory;
• a processor coupled to the memory, the processor including:
• a processing core which includes:
• a first array of electro-migration (EM) monitors including first and second EM monitors, wherein the first and second EM monitors include first and second switches and first and second conductors, wherein the first and second switches are coupled to the first and second conductors, respectively;
• and
• first and second comparators coupled to the first and second switches, respectively;
• and
• an input-output (IO) domain coupled to the processing core and located along a periphery of the processor, wherein the IO domain includes:
• a second array of EM monitors including first and second EM monitors, wherein the first and second EM monitors of the second array include first and second switches and first and second conductors, wherein the first and second switches are coupled to the first and second conductors, respectively;
• and
• third and fourth comparators coupled to the third and fourth switches, respectively;
• and
• a wireless interface for allowing the processor to communicate with another device.