Leakage mitigation at image storage node
AssigneeSensors Unlimited, Inc.
InventorsMinlong Lin, Joshua Lund, John Liobe
Life of this patent
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Abstract
A leakage mitigation circuit is provided. The leakage mitigation circuit includes an inverter coupled to a storage node, wherein the storage node receives a signal output by an imaging pixel having a first voltage level to be stored. The inverter inverts the signal to a second voltage level. A single transistor coupled to the inverter and the storage node inverts the signal output by the inverter to the first level to hold the signal at the storage node to its original level. A self-biased device coupled to the inverter lowers current disturbance related to the storage node and increase threshold voltage at which fluctuation of the level of the signal at the storage node causes the signal to be inverted by the inverter.
Claims20
A leakage mitigation circuit comprising:
- an inverter coupled to a storage node, the storage node receiving a signal output by an imaging pixel having a first voltage level to be stored, the inverter inverting the signal to a second voltage level;
- a single transistor coupled to the inverter and the storage node, the single transistor inverting the signal output by the inverter to the first level to hold the signal at the storage node to its original level;
- and
- a self-biased device coupled to the inverter to lower current disturbance related to the storage node.
A method to mitigate leakage from a storage node of an imaging pixel, the method comprising:
- receiving a signal output by an imaging pixel, the signal having a first voltage level to be stored;
- inverting the signal to a second voltage level in response to receiving the signal;
- and
- inverting, using a single electrical component, the signal to the first voltage level to hold the signal to its original level in response to inverting the signal to the second level.
An imaging device having a focal plane array comprising an imaging pixel array and a leakage mitigation circuit, the leakage mitigation circuit comprising:
- an inverter coupled to a storage node, the storage node receiving a signal output by an imaging pixel of the imaging pixel array, the signal having a first voltage level to be stored, the inverter inverting the signal to a second voltage level;
- a single transistor coupled to the inverter and the storage node, the single transistor inverting the signal output by the inverter to the first level to hold the signal at the storage node to its original level;
- and
- a self-biased device coupled to the inverter to lower current disturbance related to the storage node.
Dependencies are inferred from the claim text.