Programmable controller system
AssigneeMitsubishi Electric Corporation
InventorsKentaro TOGANO, Masaya TAKAHASHI
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AssigneeMitsubishi Electric Corporation
InventorsKentaro TOGANO, Masaya TAKAHASHI
Estimating the term…
A programmable controller system includes a control device; a functional device including a buffer memory and a general-purpose logic unit; and a peripheral device that creates a user program. The peripheral device includes a circuit setting unit, which sets operation data indicating the operation of a logic of the general-purpose logic unit; and a circuit-control-parameter setting unit, which sets a circuit control parameter representing the relation between a buffer memory address indicating an address in the buffer memory and a logic address indicating an address in the logic. The functional device includes a circuit control unit that transfers the operation data to the logic address on the basis of the specified buffer memory address and the circuit control parameter.
A programmable controller system comprising:
A programmable controller comprising:
A programmable controller comprising:
A display device for a programmable controller that includes a control device and a functional device that is connected to the control device via a bus and that includes a buffer memory and a general-purpose logic unit, the display device displaying a circuit-control-parameter setting unit that sets a circuit control parameter that represents a relation between a buffer memory address indicating an address in the buffer memory and a logic address indicating an address in a logic of the general-purpose logic unit and that is used for transfer of operation data indicating an operation of the logic to the logic.
A display device for a programmable controller that includes a control device and a functional device that is connected to the control device via a bus and that includes a buffer memory and a general-purpose logic unit, the display device displaying a circuit-state-acquisition-parameter setting unit that sets a circuit-state acquisition parameter that represents a relation between a buffer memory address indicating an address in the buffer memory and a logic address indicating an address in a logic of the general-purpose logic unit and that is used for acquisition of state data of the logic.
Dependencies are inferred from the claim text.