Timing adjustment method for drive circuit and timing adjustment circuit for drive circuit

A timing adjustment circuit for a drive circuit,

• the drive circuit including:
• a rise detection unit that detects a rise start of an inter-conduction-terminal voltage of a voltage-driven semiconductor element when the voltage-driven semiconductor element is turned off;
• a timing signal output unit that outputs a speed change timing signal after a set delay time has elapsed from detection of the rise start;
• and
• a conduction control unit that initially discharges a conduction control terminal of the voltage-driven semiconductor element at a high speed, and changes a discharge speed to a low speed after the speed change timing signal is input, when the voltage-driven semiconductor element is turned off in response to an input drive signal,
• the timing adjustment circuit of adjusting a delay time set to the timing signal output unit, the circuit comprising:
• a pulse generation circuit that outputs the drive signal, having a level for turning off the voltage-driven semiconductor element, to the driving circuit for a predetermined time period when a test mode signal is at a high level;
• a comparator that outputs a detection signal when a voltage of the conduction control terminal falls below an estimated terminal voltage,
• wherein the estimated terminal voltage is obtained by estimating a voltage of the conduction control terminal at a time point when a rise completion time elapses, and a time interval, from the rise start of the inter-conduction terminal voltage until the inter-conduction-terminal voltage reaches a power supply voltage supplied to a high-potential side conduction terminal, is defined as the rise completion time when the voltage-driven semiconductor element is turned off;
• and
• a delay time setting device that:
• increases a delay time, set to the timing signal output unit, by a predetermined unit time when the detection signal is not output after the drive signal, outputted from the pulse generation circuit, is changed to a level for turning off the voltage-driven semiconductor element before the level is inverted;
• and
• fixedly sets the delay time, set at a time point when the detection signal is output for the first time, to the timing signal output unit.