US 2017/0093383 A1 · LOW POWER AMPLIFIER

Abstract

A phase-locked loop (PLL) circuit, sense amplifier circuit, and method of operating a sense amplifier circuit are disclosed. The sense amplifier circuit comprises first and second operational amplifiers, each operational amplifier respectively comprising a non-inverting input terminal, an inverting input terminal, and an output stage comprising a current gating circuit having two current gating input terminals, the output stage coupled with an output terminal, the output terminal providing a feedback signal to the inverting input terminal. The input voltage signal is received across the non-inverting input terminals of the first and second operational amplifiers, and is received across the two current gating input terminals of each of the first and second operational amplifiers, wherein the sense amplifier circuit generates a sense voltage signal across the output terminals of the first and second operational amplifiers.

Claims20

Dependent claims

A phase-locked loop (PLL) circuit, comprising:

a phase detector configured to generate a phase difference signal based on a received reference clock signal and a feedback clock signal;
a filter circuit;
a charge pump configured to generate, based on the phase difference signal, a filter voltage signal across the filter circuit;
sense amplifier circuitry configured to generate a sense voltage signal based on the filter voltage signal, wherein the filter voltage signal is applied to an output stage of the sense amplifier circuitry, and wherein the charge pump is further configured to generate the filter voltage signal based on the sense voltage signal;
and
a variable frequency oscillator configured to generate an output signal having a frequency based on the filter voltage signal, wherein the feedback clock signal is based on the output signal.

3 more elements

A sense amplifier circuit for receiving an input voltage signal, the circuit comprising:

first and second operational amplifiers, each operational amplifier respectively comprising:
a non-inverting input terminal;
an inverting input terminal;
an output stage comprising a current gating circuit having two current gating input terminals, the output stage coupled with an output terminal, the output terminal providing a feedback signal to the inverting input terminal,
wherein the input voltage signal is received across the non-inverting input terminals of the first and second operational amplifiers, and is received across the two current gating input terminals of each of the first and second operational amplifiers, wherein the sense amplifier circuit generates a sense voltage signal across the output terminals of the first and second operational amplifiers.

2 more elements

A method of operating a sense amplifier circuit comprising first and second operational amplifiers, each operational amplifier respectively comprising non-inverting and inverting input terminals and an output stage including a current gating circuit, the method comprising:

receiving, across the corresponding non-inverting input terminals of the first and second operational amplifiers, an input voltage signal;
processing the received input voltage signal using one or more input stages of the first and second operational amplifiers;
applying, at the respective output stage of each of the first and second operational amplifiers, the input voltage signal across a respective two current gating input terminals of the current gating circuit to control the operation thereof;
and
generating, based on the processed input voltage signal and the applied input voltage signal, a sense voltage signal across output terminals of the first and second operational amplifiers.

2 more elements

Dependencies are inferred from the claim text.

Low power amplifier

Life of this patent

Low power amplifier

Life of this patent

Abstract

Claims20