Semiconductor device having a metal oxide metal (mom) capacitor and a plurality of series capacitors and method for forming

A processing system on a chip (SOC) comprising:

• analog circuitry;
• a sea of logic gates;
• a memory device coupled to the sea of logic gates, the memory device including:
• an array of memory cells;
• a charge pump coupled to supply a first voltage to the memory cells;
• a capacitor module coupled to the charge pump, the capacitor module including:
• a first capacitor including a first electrode formed as a first doped well region in a substrate;
• a second capacitor including a first electrode formed as a second doped well region in the substrate, the second capacitor is coupled in series with the first capacitor;
• a metal-oxide-metal (MOM) capacitor formed over the first and second capacitors and coupled in parallel with the first and second capacitors.

A method of making a semiconductor device comprising:

• forming a first doped well region in a substrate for a first electrode of a first capacitor;
• forming a second doped well region in the substrate for a first electrode of a second capacitor;
• simultaneously forming a dielectric layer over the first and second doped well regions and at least one of a logic device and memory device in another region of the substrate;
• forming a conductive layer over the dielectric layer to simultaneously form a second electrode for the first and second capacitors and a portion of a control gate for the at least one of the logic device and the memory device;
• and
• forming a third capacitor in an interconnect layer over the first and second capacitors, wherein the first and second capacitors are coupled in series and the third capacitor is coupled in parallel with the first and second capacitors.