Arbitrating and multiplexing circuitry
AssigneeArm Limited
InventorsAndrew David TUNE, Peter Andrew RIOCREUX, Alessandro GRANDE
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AssigneeArm Limited
InventorsAndrew David TUNE, Peter Andrew RIOCREUX, Alessandro GRANDE
Estimating the term…
Arbitrating and multiplexing circuitry for performing an arbitration between a plurality of inputs and a selection of at least one of said plurality of inputs to provide an output comprises arbitrating tree circuitry having X arbitrating levels, where X is an integer greater than one; and multiplexing tree circuitry having Y multiplexing levels, where Y is an integer greater than one; wherein (i) said Y multiplexing levels comprise a first set of said multiplexing levels upstream of a second set of said multiplexing levels; (ii) said first set of said multiplexing levels is configured to operate in parallel with at least some of said X arbitrating levels, whereby said first set of multiplexing levels is configured to perform a partial selection in parallel with said arbitration performed by said X arbitrating levels; and (iii) said second set of said multiplexing levels is configured to operate in series with said X arbitrating levels, whereby said second set of multiplexing levels completes said selection to provide said output following completion of and in dependence upon said arbitration.
Arbitrating and multiplexing circuitry for performing an arbitration between a plurality of inputs and a selection of at least one of said plurality of inputs to provide an output, said arbitrating and multiplexing circuitry comprising:
A method of arbitrating and multiplexing to perform an arbitration between a plurality of inputs and a selection of at least one of said plurality of inputs to provide an output, said method comprising the steps of:
An apparatus comprising:
A method comprising:
Arbitrating circuitry for performing an arbitration between a plurality of inputs and a selection of at least one of said plurality of inputs, said arbitrating circuitry comprising:
Arbitrating circuitry as claimed in claim 39, in which each sub-level has T arbiter devices.
Dependencies are inferred from the claim text.