Hybrid charge-sharing charge-redistribution dac for successive approximation analog-to-digital converters

A method comprising:

• receiving a digital input signal having an input voltage at a first digital-to-analog converter;
• converting a first most-significant-bit of a plurality of bits of the digital input signal to be converted to an analog signal via the first digital-to-analog converter;
• charging a first plurality of capacitors of the first digital-to-analog converter by the input voltage and reference voltages during a sampling phase of the digital input signal;
• sharing charges of the first plurality of capacitors during successive approximations of a first one or more bits of the digital input signal received by the hybrid digital-to-analog converter to provide the analog signal;
• converting a first least-significant-bit of the plurality of bits of the digital input signal to be converted to the analog signal at a second digital-to-analog converter;
• charging a second plurality of capacitors of the second digital-to-analog converter based on a common mode voltage during the sampling phase of the digital input signal;
• and
• performing charge redistribution via the second digital-to-analog converter by connecting the second plurality of capacitors to receive the reference voltages during successive approximations of a second one or more bits of the digital signal.

An analog-to-digital converter comprising:

• a hybrid digital-to-analog converter comprising
• a first digital-to-analog converter configured to (i) receive a digital input signal having an input voltage, and (ii) convert a first most-significant-bit of a plurality of bits of the digital input signal to be converted to an analog signal, wherein the first digital-to-analog converter comprises a first plurality of capacitors, wherein the first plurality of capacitors are charged by the input voltage and reference voltages during a sampling phase of the digital input signal, and wherein charges of the first plurality of capacitors are shared during successive approximations of a first one or more bits of a digital signal received by the hybrid digital-to-analog converter to provide the analog signal, and
• a second digital-to-analog converter configured to convert a first least-significant-bit of the plurality of bits of the digital input signal to be converted to the analog signal, wherein the second digital-to-analog converter comprises a second plurality of capacitors, wherein the second plurality of capacitors are charged based on a common mode voltage during the sampling phase of the digital input signal, and wherein the second digital-to-analog converter is configured to perform charge redistribution by connecting the second plurality of capacitors to receive the reference voltages during successive approximations of a second one or more bits of the digital signal;
• an amplifier or integrator configured to amplify or integrate the analog signal;
• a latch configured to latch an output of the amplifier or integrator;
• and
• a successive approximation module configured to (i) receive an output of the latch, and (ii) perform the successive approximations of the first one or more bits of the digital signal and the successive approximations of the second one or more bits of the digital signal.