Methods and devices for reducing array size and complexity in automata processors

An apparatus, comprising:

• one or more processors configured to:
• calculate a first position encoded pattern based on a first data pattern;
• and
• compare the first position encoded pattern to a second position encoded pattern to identify a second data pattern within the first data pattern.

A method for identifying a sequential data pattern within an input data pattern, comprising:

• calculating a plurality of position values each corresponding to one or more data symbols of the sequential data pattern;
• generating a position encoded pattern based on the sequential data pattern, wherein the position encoded pattern comprises the plurality of position values;
• and
• loading the position encoded pattern onto one or more automatons of an automata processor such that the position encoded pattern may be utilized to identify the sequential data pattern within the input data pattern based on the plurality of position values.
• encoded identifiable data pattern into a data pattern matching automaton

A device, comprising:

• a processor, comprising:
• a plurality of state transition elements (STEs), comprising:
• a first STE configured to identify one or more position encoded values generated based on a first data pattern to identify the first data pattern within a received second data pattern;
• and
• a second STE configured to be activated when the one or more position encoded values of the first data pattern matches one or more position encoded values of the second data pattern, and to report an approximate match between the first data pattern and the second data pattern.